Pins stuck high or low in Cyclone II

[Altera_Forum]

Hi, 

 We are using a Cyclone II FPGA in our design and have the following problem. Some pins of the FPGA are either stuck high or stuck low no matter what we drive out on the pins from the Logic. I have checked the compilation warnings too and could not find any corresponding to the pins in question.  The weird thing is that all the pins that are stuck in a state (high or low) are from Bank 4 of the FPGA.   Can anyone of you suggest what's going on? Could it be a bug in the compiler or with the Hardware itself?  Thanks, Regards, Aditi.

[Altera_Forum]

As a first step, inspect the pin file in the compiler report. What does it say about these pins?

[Altera_Forum]

Hi, 

 I have checked the Pin-out file in the compilation report. It shows all the pins named correctly and showing they are all  User assigned pins. Is this what you wanted me to check? Anything else to look at?  Thanks, Aditi.

[Altera_Forum]

--- Quote Start ---  Is this what you wanted me to check?  --- Quote End ---   Yes. Hardware shorts, damaged FPGA, or logic design errors should be expected otherwise.

[Altera_Forum]

Hi, 

 It might not be the Hardware or the FPGA because we have checked it across multiple boards and the behaviour remains the same. The common thing among all these pins is BANK4 with combinational logic.  We can see the pins change logic levels in the Signal Tap Logic Analyzer but not on the scope.  Thanks, Aditi.

[Altera_Forum]

As far as I'm aware of, Cyclone II hasn't hidden features that can be expected to cause similar problems. At least, I didn't face them yet. 

 To be sure, that it's not a design problem, I would need to see the Quartus project.