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I got a error message from my code where I was trying to use DDIO_OUT Megafunction:
DDIO_OUT_CACLK ddio_out_inst( //36 bit .datain_h ( {12'd0,1'b0,outGrididx,outVld,outStart,outWd[31:0]} ) , .datain_l ( {12'd0,1'b1,outGrididx,outVld,outStart,outWd[31:0]} ), .outclock(oclk), .dataout ( { all_zer0,out_wdclk,out_gridx,out_vld,out_start,out_wd} ) ); Error: Output port "DATAOUT" of DDIO_OUT WYSIWYG "gbe_out:FG2_OUT0|DDIO_OUT_CACLK:ddio_out_inst|altddio_out:ALTDDIO_OUT_component|ddio_out_dbj:auto_generated|ddio_outa[33]" has invalid signal-splitter fan-outs. Error: Output port "DATAOUT" of DDIO_OUT WYSIWYG "gbe_out:FG2_OUT0|DDIO_OUT_CACLK:ddio_out_inst|altddio_out:ALTDDIO_OUT_component|ddio_out_dbj:auto_generated|ddio_outa[32]" has invalid signal-splitter fan-outs. Could someone help me on that?Link Copied
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Did you connect the DDIO_OUT to an internal net instead to an output pin?
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What is 'all_zer0'? Is that what it sounds like, or is this actually connected to output ports?

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