Problem with DMA Controller in Qsys

[AHadi]

I am trying to add a DMA Controller in Qsys in Quartus Prime 16.1 but during generating the VHDL code it fails due to the following error:

Can anyone advise how to resolve this?

Thanks!

[Kenny_Tan]

Can you use the latest release of Quart Prime 18.1? There are quite a lot bugs fixed there.

[AHadi]

Hi KTan,

Thanks for your response. I can try switching to 18.1 and see if it will be fixed.

Before then, I played with different parameters and noticed that when I decrease the size of on-chip-memory to 16384 bytes or lower, qsys generates the VHDL code successfuly. I am attaching a screenshot of the qsys (it is very simple). The device is MAX10: 10M08SAE144C8GES. I switched the device to MAX10: 10M16SAU169C8G and it was the same; QSYS compiles for on-chip memory size of 16384 bytes and fail for larger. The error is same as above. Do you have any insight on why it happens?

[Kenny_Tan]

I suspect this would due to insufficient memory that you have in your computer. What OS and the spec of computer that you were using? Can you attached your qsys files for me to try it on my side?

[AHadi]

Hi KTan9,

I am using a Windows 10 system with specs below:

I am attaching the qsys file.

I experimented more and noticed that when I set the SRAM to a 2^n values larger than 64 (64, 128, 256,...) , it generates HDL code successfuly but it fails otherwise.

For example if I set it to 20,480, it fails but if I set it to 32,768 (2^15) it succeeds.

[Kenny_Tan]

Can you try increase your computer ram to 32G? try a different machine?

[AHadi]

I tried on a different machine with 64G ram and still the same error.

[Kenny_Tan]

I try on my side and I dint get any failure. I am using windows 10 as well. Attached the screenshot

[AHadi]

Did you use quartus 16.1 or a later version?

for what ram values did it compile?

Thanks.

[Kenny_Tan]

I am using Q18.1, I just download the NIOS file from the above. The is shown in the above screenshot.

[AHadi]

Hi KTan9,

In the qsys file uploaded above, the SRAM memory size is 16384 bytes which I can compile too but when you increase the SRAM it fails.

In general, when the SRAM is set to a 2^n values larger than 64 (64, 128, 256,...) , it generates HDL code successfuly but it fails otherwise. For example if I set it to 20,480, it fails but if I set it to 32,768 (2^15) it succeeds

[AHadi]

Try this. It fails on my side:

[Kenny_Tan]

This time i am using Q19.1std. not failing as well. Attached the screenshot

[AHadi]

Hi KTan9,

I have been trying for few days upgrading from quartus 16.1 to 18.1 Lite. I installed the software and the updates and can successfuly compile my project in quartus. However, when I want to create a new project with BSP in Nios 18.1, I get the error below. I get the error for all the templates. Do you know a workaround? Thanks again for all your help,

[Kenny_Tan]

This usually happened if you do not create the bsp as the admin. If still not solve, you can post this new question to the correct area

https://forums.intel.com/s/topic/0TO0P000000MWkiWAG/nios-ii-embedded-design-suite-(eds)

Thanks