I am trying to add a DMA Controller in Qsys in Quartus Prime 16.1 but during generating the VHDL code it fails due to the following error:
Can anyone advise how to resolve this?
Thanks for your response. I can try switching to 18.1 and see if it will be fixed.
Before then, I played with different parameters and noticed that when I decrease the size of on-chip-memory to 16384 bytes or lower, qsys generates the VHDL code successfuly. I am attaching a screenshot of the qsys (it is very simple). The device is MAX10: 10M08SAE144C8GES. I switched the device to MAX10: 10M16SAU169C8G and it was the same; QSYS compiles for on-chip memory size of 16384 bytes and fail for larger. The error is same as above. Do you have any insight on why it happens?
I am using a Windows 10 system with specs below:
I am attaching the qsys file.
I experimented more and noticed that when I set the SRAM to a 2^n values larger than 64 (64, 128, 256,...) , it generates HDL code successfuly but it fails otherwise.
For example if I set it to 20,480, it fails but if I set it to 32,768 (2^15) it succeeds.
In the qsys file uploaded above, the SRAM memory size is 16384 bytes which I can compile too but when you increase the SRAM it fails.
In general, when the SRAM is set to a 2^n values larger than 64 (64, 128, 256,...) , it generates HDL code successfuly but it fails otherwise. For example if I set it to 20,480, it fails but if I set it to 32,768 (2^15) it succeeds
I have been trying for few days upgrading from quartus 16.1 to 18.1 Lite. I installed the software and the updates and can successfuly compile my project in quartus. However, when I want to create a new project with BSP in Nios 18.1, I get the error below. I get the error for all the templates. Do you know a workaround? Thanks again for all your help,
This usually happened if you do not create the bsp as the admin. If still not solve, you can post this new question to the correct area