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I have 3 files( 1 photo ) and when i compile with lab2_1, like TOP-Level entity i see a normal RTL-view ( 2nd photo ), but in Modelsim i don't see output Y, just from lpm_decode0, and when i set as TOP-Level entity to "Lab22", in RTL-viewer i see just one scheme, while should see the same RTL-scheme ( 3rd photo )
link on project: click
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Hi Da Nil,
Can we have a quick call? , there seem to be a multiple issue at your end, first rtl viewer and modelsim simulation as I can see. I will send a team meeting at your email. Please take a look
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We can, but my english not very well, if it doesn't bother u, np
I have GMT+3
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Hi Da,
No problem, I send it to your email, we can communicate via email
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Hello Da Nil,
Thanks for the call yesterday. As we discussed, the reason you see different rtl viewer when using lab22 is because there is no other entity called after that, no hierarchy, because lab22 is part of the lab21. When you compile, quartus engine will execute according to the hierarchy. That is the reason you will see right behavior in rtl viewer when set lab21 as top level. The lab21(gate level figure) and lpm decoder is being called (part of the hierarchy)
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Hi Da Nil,
Let me know if there is any update or concern at your end
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 10/10 survey
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As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 10/10 survey
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