Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Programming a MaxII and have an error 44

Altera_Forum
Honored Contributor II
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Hi 

 

I'm trying to program my CPLD, but when I plug the USB blaster and start the tool Programmer, I have the error 44. What can I do with that? 

 

Maybe I've made some mistake with the VCCint and VCCIO pins. On my proto all the VCC are linked, is this a mistake? I've done this because I power the CPLD in 3.3V and my outs are in 3.3 too. 

 

I've seen that all the VCC pins must be connected. 

 

I don't remember if TCK TMS need a pull up or down resistor, maybe it is my mistake. 

 

Thanks for helping
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Altera_Forum
Honored Contributor II
2,964 Views

I've forgotten to put ground and VCC of the JTAG but it did not work anyway.

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Altera_Forum
Honored Contributor II
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I put the entire error message 

 

Error: Can't access JTAG chain 

Error: Unexpected error in JTAG server -- error code 44 

Error: Operation failed 

 

Maybe it can help
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Altera_Forum
Honored Contributor II
2,964 Views

hi,  

 

i have an EPM570GT100C5N MAX II CPLD and get exactly the same errors on Quartus II 9.0, 9.1 and 11.0. 

 

Could you solve the problem meanwhile, please? 

 

Cheers 

MIchael
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Altera_Forum
Honored Contributor II
2,964 Views

Have you solved this problem? 

I'm getting the same error with MAX V, 5M570ZT100C4N , My VCCIO and JTAG at 3.3V 

Anything?
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Altera_Forum
Honored Contributor II
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Yes, you have to add pull resistor, check if your programmer need that target CPLD is powered before programming. 

 

example schematic (http://elecfreaks.com/store/download/datasheet/dev%20platform/fpga/epm240.pdf

 

Connecting Vio and Vint together is ok, check if there are enough decoupling capacitor
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