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Hi,
我需要在Qartus 18.1中做3个信号的路径约束。将三个寄存器的输出连到3个相邻的管脚上,要求3个信号的延时相同,最好走的路径也相近,请问怎么约束?
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Hi,
You may use the set_max_skew constraint to perform maximum allowable skew analysis between sets of registers or ports.
If you want to set the maximum allowable delay, you may use set_max_delay to specifies a maximum delay exception for a given path.
Thanks.
Best regards,
KhaiY
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hi,
除了约束skew,怎样固定布线路径?
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Hi,
You may set a region for placement and routing but not a specific routing path. To lock the region, you may use logic lock.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-design-optimization.pdf Chapter 6.5.1. Creating Logic Lock Assignments with Tcl commands
Thanks.
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你好,
我能够把我的输出寄存器给约束位置吗?
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使用什么语法约束?有没有例子?
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Hi,
You can create the Logic Lock region using the GUI or qsf assignment.
For example,
1) use the assignment below to create a new placement region with bounding box
coordinates X46 Y36 X65 Y49:
set_instance_assignment -name PLACE_REGION "X46 Y36 X65 Y49" -to <node names>
2) use the assignment below to create a routing region with bounding box coordinates X46 Y36 X65 Y49: set_instance_assignment -name ROUTE_REGION -to "X46 Y36 X65 Y49"
Please note that all instances with a routing region assignment must have a respective placement region; the routing region must fully contain the placement region.
Thanks.
Best regards,
KhaiY
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Hi,
Do you have any updates?
Thanks.
Best regards,
KhaiY

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