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Honored Contributor I

Quartus 17.0 Error on FIR II IP Core

Dear Community, 


I am trying to generate an FIR II IP core in order to use it and test it's performance on my Cyclone V DE1-SoC platform. 

However the Generate process failed and does not output all the required files, stating that a folder called "backend" in the dspba directory is not available 

I have tried reinstalling the DSP Builder 17.0, but nothing was fixed, I also tried installing DSP builder while skipping matlab inclusion, and still the same error appears (when dsp builder is installed with the maltab path it generates an error at the end, I fixed that using the fix shortcut to launch matlab from dsp build) 


I have attached the error screenshots, and a screenshot of the dspba folder 


I have tried the following as well: 

Run the program as administrator 

Include the global and local IP search paths using the quartus module (I included the IP folder and the whole program folder) 




Warning: FIRDirect: Generation Error: Error starting the process ([C:/intelfpga/17.0/quartus//dspba/backend/windows64/fir_ip_api_interface, dummy, null, CYCLONEV, medium, 350, 0, 1, 100, 37, 1, 1, 1, nsym, 1, 8, 3, 4, 3, 0, false, true, --, 16, 6, 20, 1280, 1000000, -1, false, false, 1, --, <<, 0,0,0,0,0,0,0,0,0,0,0,0,-1,-1,0,2,4,6,7,6,4,2,0,-1,-1,0,0,0,0,0,0,0,0,0,0,0,0]): Cannot run program "C:\intelfpga\17.0\quartus\dspba\backend\windows64\fir_ip_api_interface" (in directory "C:\intelFPGA\17.0\ip\altera\dsp\altera_fir_compiler_ii\src"): CreateProcess error=2, The system cannot find the file specified  



Thank you 

Much appreciated
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Honored Contributor I

Solved by re installing everything again