I think this is a bug, but I'm not sure where to post bug reports.
I have been unable to program my stratix 10 L-tile dev kit (1SG280LU2F50E2VGS3) with either quartus pro 18.1 or 19.1.
I can program with pro 18.0 only. A project made and compiled in 18.0 will fail to program in 18.1. The progress bar stalls at 10% and fails with this error message
Info(209060): Started Programmer operation at Thu Jun 20 10:09:46 2019 Info(18942): Configuring device index 2 Error(18950): Device has stopped receiving configuration data Error(18948): Error message received from device: Device is in configuration state. Error(209012): Operation failed Info(209061): Ended Programmer operation at Thu Jun 20 10:09:58 2019
I then need to power cycle the board to reprogram it with 18.0
To summarize, I can only compile and program a project for the L-tile with one version of quartus pro: 18.0
I'm pretty sure this isn't a usbblaster issue, since Quartus 18.0, 18.1, and 19.1 all use the driver, and I can compile and program the board in 18.0, but not 18.1 or 19.1.
I'm running on Ubuntu 16.04, but I've also run into this problem in Windows 7.
Sometimes this might happen when you have multiple Quartus install in your PC. I would recommend you to try and update your driver so that it is matching the driver in Quartus 19.1.
Please also refer to the exiting issue in Quartus 18.1 or later (https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/compon...). If you design is using the 3V IO then you will need to follow the guideline.
Thanks for the link, it looks similar to the problem I'm having. Is this specific to projects with transceivers? I'm having the problem even if I don't have a transceiver implemented.
How do I actually power up the 3.0V rails? The link isn't very descriptive, nor is the manual linked there (https://www.intel.com/content/www/us/en/programmable/documentation/lod1484643014646.html#ici14846443...)
Could you try to create a very simple design that do not use IO3V IO pins to see if you are also facing the same issue? From the development kit schematic, the power supply should be already been power up.
At the moment, I'm using a simple design that uses the 50MHz clock to drive a PLL, with signaltap monitoring the pll output. There are no transceivers on IO3V pins implemented.
I'll attach the design tomorrow when I get back to the office
I observed that you are using 1SG280LU2F50E2VG in your project rather than 1SG280LU2F50E2VGS3 which is on your board. I would recommend you to change the device to the correct one.