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Quartus Design Partitions Crash - SR 00325624

SO
Beginner
1,436 Views

This a continuation of SR 00325624.

I'm trying to use Design Partitions to route a timing critical block containing a hard IP PCIe and DDR4 controller but when I reach the fit step, Quartus crashes with the following message claiming it's trying to place two PLLs for the EMIF. The design compiles flat with no issues other than missing timing.

Arria 10 SoC

No HPS

No Signal Tap

 

On a related note, quartus also crashes during the synthesis step with multiple Design Partitions when the # of processors allowed for compilation is greater than 1 with an "Access Violation".

 

Problem Details

Error:

Internal Error: Sub-system: EMIF, File: /quartus/periph/emif/emif_gen6_emif_system.cpp, Line: 2645

Expected to get 1 pll but found 2 plls for group EMIF_0_pxe_host_interface_altera_emif_180_kidueyy

Stack Trace:

   0x9d1a8: EMIF_GEN6_EMIF_SYSTEM::create_emif_phylite_group_cell + 0x4e4 (periph_emif)

   0xa89fd: EMIF_GEN6_EMIF_SYSTEM::create_emif_cells + 0x1c1 (periph_emif)

   0x7c831: EMIF_GEN6::create_design + 0xf5 (periph_emif)

    0xdf4c: PCC_ENV_IMPL::perform_op + 0x2ac (periph_pcc)

    0xdc0a: PCC_ENV_IMPL::create_design + 0xda (periph_pcc)

    0xcc19: PCC_ENV_IMPL::refresh_design_until_converged + 0x175 (periph_pcc)

    0xd4bb: PCC_ENV_IMPL::refresh + 0xff (periph_pcc)

    0xd91f: PCC_ENV_IMPL::load_design + 0xfb (periph_pcc)

   0x2ac56: pcc_load_periph_design + 0x96 (periph_pcc)

   0x161e2: TclNRRunCallbacks + 0x62 (tcl86)

   0x2a1f3: pcc_load_periph_placer + 0x12b (periph_pcc)

   0x161e2: TclNRRunCallbacks + 0x62 (tcl86)

   0x17a65: TclEvalEx + 0xa65 (tcl86)

   0x18257: Tcl_Eval + 0x37 (tcl86)

   0x105e7: atcl_tcl_eval + 0x117 (ccl_atcl)

   0x2a1d0: atcl_run_internal_tcl_cmd + 0xb0 (ccl_atcl)

   0x12450: fit2_fit_plan_init + 0x240 (comp_fit2)

   0x161e2: TclNRRunCallbacks + 0x62 (tcl86)

    0x4049: fit2_fit_plan + 0x389 (comp_fit2)

   0x161e2: TclNRRunCallbacks + 0x62 (tcl86)

   0x17a65: TclEvalEx + 0xa65 (tcl86)

   0xa6f8b: Tcl_FSEvalFileEx + 0x22b (tcl86)

   0xa5646: Tcl_EvalFile + 0x36 (tcl86)

   0x12606: qexe_evaluate_tcl_script + 0x376 (comp_qexe)

   0x11864: qexe_do_tcl + 0x334 (comp_qexe)

   0x16755: qexe_run_tcl_option + 0x585 (comp_qexe)

   0x380c3: qcu_run_tcl_option + 0x1003 (comp_qcu)

   0x160aa: qexe_run + 0x39a (comp_qexe)

   0x16e51: qexe_standard_main + 0xc1 (comp_qexe)

    0x2233: qfit2_main + 0x73 (quartus_fit)

   0x12e98: msg_main_thread + 0x18 (CCL_MSG)

   0x1467e: msg_thread_wrapper + 0x6e (CCL_MSG)

   0x16660: mem_thread_wrapper + 0x70 (ccl_mem)

   0x12761: msg_exe_main + 0xa1 (CCL_MSG)

    0x287e: __tmainCRTStartup + 0x10e (quartus_fit)

   0x13033: BaseThreadInitThunk + 0x13 (KERNEL32)

   0x71430: RtlUserThreadStart + 0x20 (ntdll)

 

End-trace

 

 

Executable: quartus_fit

Comment:

None

 

System Information

Platform: windows64

OS name: Windows 10

OS version: 10.0

 

Quartus Prime Information

Address bits: 64

Version: 18.0.0

Build: 614

Edition: Standard Edition

 

0 Kudos
7 Replies
KhaiChein_Y_Intel
505 Views

Hi,

 

Can you try to clean the project and compile again?

Project >Clean Project

 

Thanks.

 

 

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SO
Beginner
505 Views

Did Project-> Clean. No Change.

I realized a lot of .db files were not removed with the clean so I deleted them manually. I then had to fight through some weird pin assignment issues that came up related to the DDR4 EMIF but ended up at the same point. A couple times the fitter just said there was an error and gave no details or crash notice. The overriding theme of the errors is that Quartus is trying to place a duplicate pin/pll in the same location then complaining there's an error.

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KhaiChein_Y_Intel
505 Views

I run the design in Windows and the compilation is successful. Have you try to compile the archive design you have provided earlier?

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DBay
New Contributor I
505 Views

18 is inherently unstable. It will crash if anything isn't exactly as it expects. I have had a lot of problems with LL regions. This seems different, but delete all db related folders, reset to standard fitter and reset to default settings. The advanced fitters seem to crash a lot if anything more than standard.

Try to compile first with only source code and no partitions. This will probably work. Then add in slowly to find what about your design crashes the software. After weeks of work I finally have gotten an old project from 13.1 to not crash and actually compile by attacking it incrementally.

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SO
Beginner
505 Views

DBay, thanks for the advice. I'm currently separating the partitions more logically by reworking my hierarchy maybe I'll stumble across something. I only moved to Q18 because I have the same problem in Q16.1.2 and knew the first question from support would be if I was using the latest Quartus.

 

KYeoh, I loaded up just the QAR file in a fresh folder and hit "Start Compilation". I get to FIT and it throws the same error "...Expected to get 1 pll but found 2 plls for group..." If I stop using partitions, everything compiles fine. It only seems to error when it is pulling in the pre-fit partition for the DDR4 EMIF.

0 Kudos
KhaiChein_Y_Intel
505 Views

Hi,

I have filed a case to consult the engineering team. I will come back to you once I receive a response from the team.

 

Thanks.

0 Kudos
KhaiChein_Y_Intel
505 Views

Hi,

The IE of this case does not occur consistently in every compilation. I tried to run compilation for multiple times, I can see the IE occurred only in one or two out of all the compilations done. I provided the design to engineering team. Unfortunately, they are not able to reproduce the error on their side. I am now helping the team to reproduce the error.

 

Can you try deleting the database and compile again?

 

Thanks.

 

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