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15539 Discussions

Quartus Fitter Random Failing

James_B
New Contributor II
224 Views

I have a design for Cyclone VE that is about 90% full, and if I recompile the same design several times in a row, the design will intermittently fail on routing.

The router settings have been at Performance (High Effort) and the design compiles often. 

Any suggestions here are appreciated. Thanks. James

 

James_B_0-1655394888255.png

 

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1 Solution
sstrell
Honored Contributor III
194 Views

Choosing the performance option runs the Fitter "harder" to get better results.  Even with minor changes, you're changing the initial seed used by the Fitter so the results can be different (including not finding a valid fit).

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8 Replies
sstrell
Honored Contributor III
212 Views

How full is the device?

James_B
New Contributor II
211 Views

The device is 90% full - a Cyclone VE  5CEFA7 part. I am using Quartus 20.1 lite *and* prime standard to compile, and get the same results. 

sstrell
Honored Contributor III
203 Views

If you've got a fit that works, why are you recompiling?  If you're trying to improve performance, easier thing to do would be to use the Design Space Explorer to automatically adjust seeds and compilation options to get the best results.

James_B
New Contributor II
202 Views

Thanks for the feedback here. 

 

I have VHDL parameters at the most top level file, and that is where I set the version number of the project. What I have found is that when I sometime even just change a top level parameter, the fitter will fail, while it succeeded before. So essentially it's the same design, unless you want to say that the value of register should change the fitter results. That is why I am confused at the results here. 

 

What I have also found is that at 92% the fitter fails consistently. 

sstrell
Honored Contributor III
195 Views

Choosing the performance option runs the Fitter "harder" to get better results.  Even with minor changes, you're changing the initial seed used by the Fitter so the results can be different (including not finding a valid fit).

James_B
New Contributor II
177 Views

Thanks for the feedback. I will try efforts other than the Performance option. Timing is not critical in this design. 

RichardTanSY_Intel
157 Views

I believe sstrell has help to answer your question. Do you need further help in regards to this case?


RichardTanSY_Intel
130 Views

I believe this thread been resolve. With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos and select the best solution. 



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