Quartus II v13 - How to make/modify in Schematic layout

Intel® Quartus® Prime Software

Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

Quartus II v13 - How to make/modify in Schematic layout

1,143 Views

I recently moved from a very old CPLD platform that was all based off of logic gates. I do like how in Black Diagram/Schematic you can place down entire logic chips that mimic a design. I see there are gates available but I'm trying to make a 32 input latch with 1 enable. The software has one input/one output plus enable already, so what I am looking for are the steps to make a 32i/o with 1 enable?

Thanks for your help.

Link Copied

0 Replies

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.