Whenever I try to compile a design I get the mentioned error right after Plan at the start of "Place"ing (Early Place = off). This happens on Ubuntu 18.04 and 19.10. The error in the attached log doesn't point to anything in my design, maybe a software issue?
After the crash I can just hit Assembler, so that Quartus continues compiling, now it starts Place and finishs it without a problem.
Final design (sof) also seems to work just fine.
Is this error something I should worry about or is it fine as long as it compiles?
Log taken on:
OS: Ubuntu 19.10
Swap: 2GiB (small, but usage at 0% anyway)
Processor(s): 2x Xeon 5222 HT=off => 8 phy cores; with Quartus set to use all cores
SSD: ~800GB free
FPGA: Stratix 10 (Terasic DE10PRO; 1SG165HU2F50E2VG)
Internal Error: Sub-system: CFG_INI, File: /quartus/ccl/cfg_ini/cfg_ini_reader.cpp, Line: 1530
Couldn't parse ini setting qspc_nldm_max_step_size=10.0 as a floating point value
Could you help to provide the design.qar for investigation?
I have sent an email to you, please let me know if you do not receive.
Thank you, sadly the solution resultet in yet another error.
I also tried to sent you an email but because it's not related to a special case it just came back. (can't be deliverd)
Because this solution is still under test is it ok to post the new error (log) here? Or do you prefer to receive it in a different way?
Hint (this souldn't say much): it (error) points to sin_simulation_interface.cpp, Line: 1768
Error occures in place of the old one and behaves the same, after crash I can continue compiling using "Assembler" button and the resulting sof seems to work just fine.
...Thank you for contacting Intel Corporation. We were unable to deliver your email because the email does not appear to be related to an existing case.....
Thanks and have a nice weekend,
I have sent an email to you. Please let me know if you do not receive.
I finally got time for a few more tests:
So I started to remove ip after ip in my design and finally after removing all external memory ip's from my design the error was gone and it compiles in one go.
So I guess the patch broke somthing in combination with this ip?
I can also reproduce the said new error by using a (new) minimal design only containing some avalone-pipline bridges, a custom avalon-mm-master and the external memory ip.
If I find the time I will install the patch on window and compile the design there, to see if the error persists.
Sure. Please let me know the result once you run the compilation on the PC with patch installed.
Do you have any updates?
I had this problem too with some versions of QuartusPro, at least 19.3, both on Linux Mint and CentOS, but could not find any answers in Jan-Feb.
Today I found your posting and also this link: https://wikis.uni-paderborn.de/pc2doc/Noctua_FPGA_Usage,_Integration_and_Development
which provide a possible explanation and fix.
It is related to the linux LOCALE setting, if you use another format than US (in Europe, we use decimal comma, not point).
By setting LC_NUMERIC= ="en_US.UTF-8", at least for the QuartusPro session, the problem disappears.
Your question is related to OpenCL, which is not the same as this case. Kindly create a new forum post.
Sorry for the delayed answer, I was an vacation for last 2 weeks.
Well I tried compiling my test design using your patch on windows and it worked just fine.
But during multiple tests (on linux) I noticed that even under linux the error won't always show up (and somtimes even result in multipe messages instead of just 1) so it might have been coincidence on windows.
Anyway I noticed that Quartus 20.1 got released in the meantime, I haven't check the changlog yet, but I will give this version a try maybe it helps.