Quartus Prime Software system debugging tool support

[malayali]

Hi , 

I'm using the System debugging toolkit from the Quartus prime software and changing Rx and Tx parameters for the DP 1.4 to test loop back, using Arria10 based on our own designed board. Pl clarify the following queries.

1) Once I open the system console then I'm selecting the FPGA configuration file. then the collection is added sometime automatically consol gets closed(Crashed). Any reason?

2) Once the collection of 6 Rx and Tx pairs is added then I need to set VOD, Pre-emphasis 1st post-tap, Pre-emphasis 1st pre-tap for the Tx path and for Rx path, CTLE DC_gain, CTLE AC_gain, VGA DC gain to be set, with  High gain mode equalizer engine. Then I'm selecting everything and start the loop back and check the BER. If I need to change the equalizer engine to High datarate after High gain mode then once after setting, Do I need to close and reopen the tool?

3) Why I'm not able to change CTLE_DC gain, CTLE_AC Gain and VGA DC Gain in High datarate mode for Rx path?

4) If I run the same settings in high gain mode multiple times, E.g. close the tool after the first run then again open the tool and set the same settings then If I run, I m getting BER. But the same procedure If I do it again (Close tool then reopen, Do same settings), there is no BER. Is there any reason?

Could you pl let me know, to perform these test is there any specific steps to follow? Let me know your thoughts.

[malayali]

Pl help us on this !!!

[Kshitij_Intel]

Hi,

You do not need to close and reopen the toolkit if changing gain mode.

For DP Rates, you should probably use high gain mode as this offers more flexibility over the range of resolutions (rates) that DP runs at. The user guide does document that “in High Data rate mode, AC gain values and DC gain values cannot be controlled individually as done in high gain mode. The recommended AC gain values in high data rate mode include the appropriate setting of DC gain to get the required peaking at respective peaking frequencies."

https://www.intel.com/content/www/us/en/docs/programmable/683617/21-1/continuous-time-linear-equalization-ctle.html

if using the Intel DP IP, then you probably do not need to use the TK. the protocol does the tuning for you.

Thank you

Kshitij Goel

[malayali]

Hi Goel,

Thank you for providing this useful information.

I noticed that when I first ran in High gain mode, no BER showed. However, if I switch from High gain to High datarate mode, there is no BER in Lower datarate (RBR), but if I switch back to High gain mode, the BER appears. While I was performing the test, I didn't shut the toolkit. 

Does it because of a tool problem? Sometimes tools crash as well.

[Kshitij_Intel]

Hi,

As I know, there is no button in the TTK GUI to switch between High Gain, and High Data Rate mode. I believe you are changing modes with various AVMM writes, possibly using scripts in the TTK System Console window.

I think High Data rate and high gain modes are defined at compile time. You might have two separate designs, (one high data rate, and one high gain), and tests those separately, is the behavior different?

For Stratix 10 you can try using fully adaptive mode to tune the RX gain.

Thank you

Kshitij Goel

[Kshitij_Intel]

Hi Vivek,

Any update on this.

Thank you

Kshitij Goel