Quartus Prime Standard 20.1 Crash

[MRigh4]

Hello,

I have the following problem with my project on Quartus Prime Standard version 20.1. During the Fitting task, the tool isn't able to proceed due to an internal error. The following is the report provided by the tool itself:

Problem Details
Error:
Internal Error: Sub-system: CDB_ATOM_DYNAMIC, File: /quartus/db/cdb_atom_dynamic/cdb_atom_dynamic.cpp, Line: 864
Generic atom NIGHTFURY_IOPLL does not support input port DB_IPORT_CLOCK_ENABLE0
Stack Trace:
0x43e3: CDB_ATOM_DYNAMIC::get_input_port_definition + 0x163 (db_cdb_atom_dynamic)
0x5f39: CDB_ATOM_DYNAMIC::is_active_high + 0x39 (db_cdb_atom_dynamic)
0x6012: CDB_ATOM_DYNAMIC::is_active_high + 0xc2 (db_cdb_atom_dynamic)
0x125a87: FSAC_IO_REGISTER_PACKER_OP::iterms_are_identical + 0xc7 (FITTER_FSAC)
0x52d90: FSAC_LUT_RAM_CONVERSION_UTIL::and_oterms_and_connect_to_destination + 0x1c0 (FITTER_FSAC)
0x5ee02: FSAC_LUT_RAM_CONVERSION_UTIL::setup_lutram_ce_signal + 0x652 (FITTER_FSAC)
0x57687: FSAC_LUT_RAM_CONVERSION_UTIL::create_new_lutram_atom_from_ram_slice + 0x3f7 (FITTER_FSAC)
0x10138e: FITCC_LUT_RAM_UTILITY::convert_ram_atom_to_lutram + 0x7e (FITTER_FITCC)
0x105954: FITCC_LUT_RAM_UTILITY::perform_lutram_conversion + 0x4b4 (FITTER_FITCC)
0x588e9b: vpr_qi_ram_conversion_do_all + 0x3ab (fitter_vpr20kmain)
0x2296f7: altera_arch_cl_rams_flow + 0x257 (fitter_vpr20kmain)
0x34c29: do_clustering + 0x329 (fitter_vpr20kmain)
0x72d99: cl_flow_pack_to_cbes_2 + 0x909 (fitter_vpr20kmain)
0x72396: cl_flow_pack_to_cbes + 0x96 (fitter_vpr20kmain)
0x26d81c: l_do_clustering_phase + 0x18c (fitter_vpr20kmain)
0x26cb64: aa_flow_place + 0x64 (fitter_vpr20kmain)
0x578c1f: VPR_QI_FACADE::place_internal + 0x1f (fitter_vpr20kmain)
0x27056: FDRGN_EXPERT::run_vpr + 0x196 (fitter_fdrgn)
0x248eb: FDRGN_EXPERT::place + 0x3b (fitter_fdrgn)
0x145fb: fit2_fit_place_auto + 0x20b (comp_fit2)
0x161e2: TclNRRunCallbacks + 0x62 (tcl86)
0x3c4a: fit2_fit_place + 0x2fa (comp_fit2)
0x161e2: TclNRRunCallbacks + 0x62 (tcl86)
0x17a65: TclEvalEx + 0xa65 (tcl86)
0xa6f8b: Tcl_FSEvalFileEx + 0x22b (tcl86)
0xa5646: Tcl_EvalFile + 0x36 (tcl86)
0x12877: qexe_evaluate_tcl_script + 0x367 (comp_qexe)
0x11ac3: qexe_do_tcl + 0x343 (comp_qexe)
0x16c34: qexe_run_tcl_option + 0x584 (comp_qexe)
0x39285: qcu_run_tcl_option + 0xf95 (comp_qcu)
0x1658d: qexe_run + 0x39d (comp_qexe)
0x17371: qexe_standard_main + 0xc1 (comp_qexe)
0x2262: qfit2_main + 0x82 (quartus_fit)
0x13258: msg_main_thread + 0x18 (CCL_MSG)
0x14a5e: msg_thread_wrapper + 0x6e (CCL_MSG)
0x16af0: mem_thread_wrapper + 0x70 (ccl_mem)
0x12af1: msg_exe_main + 0xa1 (CCL_MSG)
0x2a02: __tmainCRTStartup + 0x10e (quartus_fit)
0x17033: BaseThreadInitThunk + 0x13 (KERNEL32)
0x52650: RtlUserThreadStart + 0x20 (ntdll)

End-trace

Executable: quartus_fit
Comment:
None

System Information
Platform: windows64
OS name: Windows 10
OS version: 10.0

Quartus Prime Information
Address bits: 64
Version: 20.1.1
Build: 720
Edition: Standard Edition

Do you have any suggestion?

Thank you.

[Nurina]

Hi,

It's possible there is a failure of the LUT to RAM conversion. You can disable LUT/RAM conversion. Could you try the attached ini file?

Using the attached ini file will result into your design to use only M20k resources.

Regards,

Nurina

[MRigh4]

Hi Nurina, disabling the LUT to RAM conversion as you suggested prefents the tool from crash but unfortunately my design requires an amount of RAM that make it not possible for the fitter to end using only M20K blocks. In fact now I have the following error that prevents the fitter to proceed:

Error (170048): Selected device has 2131 RAM location(s) of type M20K block. However, the current design needs more than 2131 to successfully fit

Considering the amount of memory required by the design (77% of the total available memory bits) I thought that it was possible to implement it on that device (10AX066K4F35I3SG).

Do you have any other suggestion?

Thank you very much.

[Nurina]

Hi,

Can you provide your .qar file? To generate the qar file, go to Project->Archive Project.

Thanks,

Nurina

[MRigh4]

Hi Nurina, unfortunately, due to company policy, I can't share the qar file, because it would contain all the source files of the design. I was wondering if you could suggest something to change in the settings of the fitter maybe. During my tests I noticed that reducing the complexity of the design (removing some modules, no matter which one) allows the tool to proceed. I can share the reports generated by the tool when it succeeds and when it crashes. Hope it could help..

Thank you,

Marco 

[Nurina]

Hi Marco,

Did you do any Floorplanning for this project? Did you set any LogicLock region? Perhaps you can try that. Try to optimize the resource usage, because from the crashed report it seems like your project was using way too much resources.

You can refer to this document, there are a few sections on Floorplan and LogicLock: https://www.intel.com/content/www/us/en/programmable/documentation/zov1529446404644.html#mwh1410471303170

Regards,

Nurina

[Nurina]

Hi,

We did not receive any response to the previous question/reply/answer that I have provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Regards,
Nurina

P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution!