Quartus Pro 21.1 Error in generating emif s10 example design

[aegeus]

Hi all,

I'm generating a Stratix 10 EMIF example design on windows 10, tools version is Quartus Pro 21.1, I applied the "DDR3-1333H CL9 Component 1CS 4Gb(256Mb x 16)" presets, then generate the example design,  but I got the following errors:

Error (23035): Tcl error: child process exited abnormally
while executing
"exec -ignorestderr $qsys_generate_exe_path $qsys_file --pro --quartus-project=none --synthesis --family=$family --part=$device >>& ip_generate.out"
(file "C:/Users/dell-PC/AppData/Local/Temp/alt9034_4276522150935991897.dir/0001_emif_s10_0_gen/make_qii_design.tcl" line 120)
Error (23031): Evaluation of Tcl script C:/Users/dell-PC/AppData/Local/Temp/alt9034_4276522150935991897.dir/0001_emif_s10_0_gen/make_qii_design.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings
Error: Peak virtual memory: 134 megabytes
Error: Processing ended: Fri Feb 11 09:15:42 2022
Error: Elapsed time: 00:00:35
Error: System process ID: 8128
------------------------------------------------
child process exited abnormally
while executing
"exec -ignorestderr $qsys_generate_exe_path $qsys_file --pro --quartus-project=none --synthesis --family=$family --part=$device >>& ip_generate.out"
(file "C:/Users/dell-PC/AppData/Local/Temp/alt9034_4276522150935991897.dir/0001_emif_s10_0_gen/make_qii_design.tcl" line 120)


I tried the following combinations:
Quartus pro 18.0 + s10 + "DDR3-1333H CL9 Component 1CS 4Gb(256Mb x 16)" presets, emif example design generate OK.
Quartus pro 21.1 + Arria10 + "DDR3-1333H CL9 Component 1CS 4Gb(256Mb x 16)" presets, emif example design generate OK.
Quartus pro 21.1 + s10 + other presets, emif example design generate fail!

Seems Quartus pro 21.1 generating s10 emif example design got some problem, Please give some advice, thanks.

[AdzimZM_Intel]

Hi Sir,

May I know the device that you used?

Can you provide the steps to reproduce this error?

I can generate the example design from my side but it's on Linux.

Please let me know on above questions.

Thanks,

Adzim

[aegeus]

Hi AdzimZM_Intel,

Thanks for your reply.

My device is Stratix 10 Gx series, detail model is 1SG280LN2F43E2VG.

The steps is:

1. I made a new project at  Quartus prime pro 21.1 gui, and then create a IP, at the gui's right window: Ip Catalog -> Installed IP -> Library -> Memory Interfaces and Controllers - > External Memory Interfaces Intel Stratix 10 FPGA IP;

2. then gui envoke a New IP window, I give a new ip name with "ddr_demo" and save,  at the IP Parameter Editor Pro gui, I applied the "DDR3-1333H CL9 Component 1CS 4Gb(256Mb x 16)" presets, then clicked the "Generate Example Design" botton at gui, select the dirctory in my PC, the gui starts to generate example design, after about a minute, the gui gives the Error, tell me completed with errors.

I also tried the target device 1SG280LN3F43E1VG, also completed with errors.

[aegeus]

Anybody gives some advise?

Would appreciate a lot..

[AdzimZM_Intel]

Hi Sir,

The error is likes the one you show on your first comment?

Do you see the same error if you create the example design for other devices such as Arria 10 or Cyclone 10?

Have you install any patch with the Quartus software?

Thanks,

Adzim

[aegeus]

Hi AdzimZM_Intel,

Yes, the error message is on the first comment.

There are no errors if i create the example design for Arria10, only get errors for S10.

I don't install any patch, just installed 21.1 prime pro full pack download from intel official website， I’ve seen this AR some days ago in the forum：

https://www.intel.com/content/www/us/en/support/programmable/articles/000088789.html

but this is for the quartus prime standard edition,  my tools version is prime pro, i will try this patch anyway,  later i will tell the result, thanks.

[AdzimZM_Intel]

Hi Sir,

It's strange to have this kind of error.

Does the Quartus attempted to crash somehow in the middle of compilation or during generating process?

Do you see similar issue when generating the example design for Agilex device as well?

Do you able to migrate the design from Quartus 18.0 to Quartus 21.1?

I will provide a S10 example design and hopefully you can run the compilation.

Thanks,

Adzim

[AdzimZM_Intel]

This is the qar file for S10 example design.

Please let me know if you can compile this design.

[aegeus]

Hi AdzimZM_Intel,

Sorry for the late reply.

I had a full complie with your S10 example design,  tools Version 21.1.0 Build 169 03/24/2021 SC Pro Edition, on window 10 x64.

Complile flow looks nothing wrong with it. 

[aegeus]

some additional info:

Does the Quartus attempted to crash somehow in the middle of compilation or during generating process?

--No crash happens, and project compilation is good,  but generating example process got errors.  it looks like a example design generating issue.

Do you see similar issue when generating the example design for Agilex device as well?

-- I tried Agilex device example design generating just now, got the same errors as S10( I attashed the error logs below), but arria10 device's example design generating is good, no error.

Do you able to migrate the design from Quartus 18.0 to Quartus 21.1?

--Not done yet,  i will try it later, need to install a  Quartus prime pro 18.0.

I will provide a S10 example design and hopefully you can run the compilation.

--I tried a full complile with your S10 example design, it's good. 

[aegeus]

Do you able to migrate the design from Quartus 18.0 to Quartus 21.1?

--I migrated  a example design from 18.0 to 21.1, failed to update the IP.

[AdzimZM_Intel]

Hi aegeus,

Can you unchecked and then check the default IO settings and generate the example design?

In the EMIF IP parameter (FPGA IO -> FPGA IO settings -> Use default IO settings)

Can test it for Agilex and Stratix 10 device?

Thanks.

Regards,

Adzim

[aegeus]

Hi AdzimZM_Intel,

Thanks for your advise，I found the reason for this issue，it's a windows environment variable problem。

I had install the quartus 16.1 before， when i install quartus 21.1，the environment variable on my PC still 16.1， Just now i  checked my environment variable，added a “IP_ROOTDIR” variable，change “QUARTUS_ROOTDIR” and “SOPC_KIT_NIOS2” to the real install path，then I successed to generate the example design.

I should check the windows environment at the first time,  still thanks a lot for your adivise.

[AdzimZM_Intel]

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.