Quartus tool taking longer run time

[SKuma36]

Hi,

I've a Custom controller design integrated with one instance of Arria10 Native FPGA transceiver. With this I could run synthesis & Implementation using Quartus tool successfully. We modified the design to include two instances of Arria10 Native FPGA transceiver. After this, the implementation run is taking long time (> 20hrs) and routing is not getting completed. I've attached a screen snapshot.

Is it design constraint related issue? Any suggestion to overcome this issue?

rgds,

sunil

[MuhammadAr_U_Intel]

Hi, There could be few reasons for long compile time. - Higher device utilization and fitter is having hard time to route the design. You can try few things. 1. Try selecting a target device with higher density to test if it bring down the compile time. 2. Try creating a simple design with only Native Phy instances + Reset controller + TX PLL and see if you still see longer compile times. Thanks, Arslan