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hello,
I got a project needed a pLL with the 12.8MHz input clock and the 24.576MHz output clock .And I choose ep3c16240c8 as my device.The software is Quartus11.0. then,the pll setting shows just like followed picture. http://www.alteraforum.com/forum/attachment.php?attachmentid=12214&stc=1 Actual settings shows that the true clock is 24.58814 then i got the same setting and device in Quartus9.0 . http://www.alteraforum.com/forum/attachment.php?attachmentid=12215&stc=1 Actual settings shows that the true clock is 24.576 so ,why?and ,could ep3c16240c8's PLL set the magnification as 48/25? thank youLink Copied
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