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I am trying to run the RTL simulation tool through Quartus Prime Standard Edition.
But it gives me following error in the nativelink_simulation.rpt ----------------------------------------------------------------------------------------------------------------------------------------------------- Info: Start Nativelink Simulation process executing command line: ip-make-simscript --nativelink-mode --output-directory=abcd_iputf_input --spd=C:/projects/abcd_restored/abcd1.spd --spd=C:/projects/abcd_restored/abcd2.spd --spd=C:/projects/abcd_restored/abcd3.spd --spd=C:/projects/abcd_restored/abcd4.spd --spd=C:/projects/abcd_restored/abcd5.spd --spd=C:/projects/abcd_restored/abcd6.spd Error: You did not generate the simulation model files or you generated the IP file using an older version of MegaCore which is not supported by RTL NativeLink Simulation Error: Regenerate the IP and simulation model files using the latest version of MegaCore for RTL NativeLink Simulation flow to function correctly Error: NativeLink simulation flow was NOT successful ================The following additional information is provided to help identify the cause of error while running nativelink scripts================= Nativelink TCL script failed with errorCode: NONE Nativelink TCL script failed with errorInfo: Regenerate the IP and simulation model files using the latest version of MegaCore for RTL NativeLink Simulation flow to function correctly (procedure "get_ip_info" line 1) invoked from within "get_ip_info $full_file_name" (procedure "run_eda_simulation_tool" line 195) invoked from within "run_eda_simulation_tool eda_opts_hash" ----------------------------------------------------------------------------------------------------------------------------------------- I have regenerated the IP and Simulation Models successfully . All files were updated except the .spd files. I hope i could get some insight on how to regenerate the .spd files Thank you- Tags:
- FPGA Design Tools
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