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is it possible to plug the jtag (usb blaster or other) and retrieve captured data (aquire data a postiori) with signaltap?
I mean :- Program a FPGA with SignalTap,
- Let the board functionning alone, let internal SignalTap capture data because trigger has occured
- Plug USB Blaster
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--- Quote Start --- is it possible to plug the jtag (usb blaster or other) and retrieve captured data (aquire data a postiori) with signaltap? I mean :
- Program a FPGA with SignalTap,
- Let the board functionning alone, let internal SignalTap capture data because trigger has occured
- Plug USB Blaster
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I try to find a cause of a disfunction that stops a system : it occures at 1 min or lots of days after power-on.
Because JTAG can reconfigure FPGA, I prefer NOT plugging USB Blaster when the board is functionning. The risk is too important. I made a "datalogger" board but it captures onl a few signals wich are not significant enough. So I would like to offload data from Signaltap AFTER triggered (and after securizing the system).- Mark as New
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I think you would need USB blaster connected for the SignalTap to run. I believe the data is real time streamed into the PC which are connected to the board.
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I think too.
That is a risky solution. So I am on other way.- Mark as New
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Why not just leave the USB-Blaster plugged into the board? That way the USB-Blaster is not "hot-plugged" into the JTAG header while your board is powered.
You could leave the USB-Blaster plugged into a PC, so that the cable electronics is also powered, but that is not required. You could just plug the USB-Blaster USB connector into your PC after the board has been powered. SignalTap II has a power-on trigger configuration. This allows the FPGA instance of SignalTap II to trigger, and then you can retrieve the trace at a later time. I have used this to capture an event that would only occur every few days. Cheers, Dave- Mark as New
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Because JTAG can set the FPGA into a high impedance which is catastrophic in my system, I can't allow that.
--- Quote Start --- You could just plug the USB-Blaster USB connector into your PC after the board has been powered. --- Quote End --- NOT sure. I had burnt USB Blasters this way, I think.- Mark as New
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--- Quote Start --- Because JTAG can set the FPGA into a high impedance which is catastrophic in my system, I can't allow that. --- Quote End --- Only if the TAP machine is programmed to issue the HIGHZ command. Its unlikely to randomly issue this command. --- Quote Start --- I had burnt USB Blasters this way, I think. --- Quote End --- It should work fine. The VCC_OUT voltage from the 10-pin header goes to dual-voltage buffers that are tolerant of either supply powered before the other. Cheers, Dave
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