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I want to debug an Agilex SoC FPGA fabric with signal tap. I created the stp files with signals I want to probe. Created sof, programmed the FPGA via uboot. But I don’t see any thing on the waveform display screen other than the signal names. I am not seeing any error message. Has anyone seen this issue?
Thanks
BPR
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Thanks for the previous response.
I narrowed down our issue. For some reason the Signal Tap enable command was not enabled in my generated TCL.
You can close this ticket.
Regards
BPR
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I have not see this issue before.
It could be design itself or the signal tap configuration used is incorrect.
Use simulation to verify that the signals are behaving as expected in your design.
Try using a slower clock when assigning an Acquisition Clock.
FYI, this is part 1 of 4 training for Signal Tap training. You may go through all 4 trainings to familiarize yourself with the signal tap flow.
https://www.youtube.com/watch?v=R8vUERKTDzg
Best Regards,
Richard Tan
p/s: If you find any answers from the community or Intel Support to be helpful, we encourage you to mark them as the best answer or rate them 4/5 in the survey.
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Dropping a note to ask if my last reply was helpful to you?
Do you need any further assistance from my side?
Best Regards,
Richard Tan
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Thanks for the previous response.
I narrowed down our issue. For some reason the Signal Tap enable command was not enabled in my generated TCL.
You can close this ticket.
Regards
BPR
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Great! I'm pleased to know that you are to solve the issue.
Now, I will transition this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out.
Happy Signal Tapping! It is a great tool to use.
Best Regards,
Richard Tan
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