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Simple Sinus Generator VHDL - DE2-115

Altera_Forum
Honored Contributor II
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Hello, 

 

I am a complete beginner and I have a problem. I want to create a Sinus Generator in VHDL with my FPGA Board.  

The generated sinus should be displayed on the line out. But I have no clue, how to start.  

Can anybody help me, post the code and explain how I have to assign my pins? 

 

 

Thank You. DonGiacomo
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Altera_Forum
Honored Contributor II
313 Views

 

--- Quote Start ---  

Hello, 

 

I am a complete beginner and I have a problem. I want to create a Sinus Generator in VHDL with my FPGA Board.  

The generated sinus should be displayed on the line out. But I have no clue, how to start.  

Can anybody help me, post the code and explain how I have to assign my pins? 

 

 

Thank You. DonGiacomo 

--- Quote End ---  

 

 

The simplest sine generator is that of clk/2 i.e. just two samples e.g. +1000, -1000 

pass it out onto DAC data running at clk speed.
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