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OHarb1
Novice
206 Views

Speeding up Quartus P&R in the cloud

I'm running Quartus P&R in the Google Cloud inside a Docker image and I'd like to speed it up.

 

Especially I'd like to speed up the startup times.

 

The speed of launching P&R is critical, as any hard error messages are likely to be produced within first few minutes of running P&R. My mistakes are often in silly mistakes during IP is generation that are quickly fixed.

 

The lowest hanging fruit is to minimize the Quartus installation disk size as the Docker image is 108gByte, which takes ca. 20 minutes to launch. P&R takes 3h30 on a 32 thread 64gByte machine.

 

I only need device files for Arria 10 DEVICE 10AX115S2F45I1SG.

 

  1. What install options should I use?
  2. Are there any large files in the Quartus installation that I can delete without affecting correct execution of quartus_sh and quartus_sta?

 

 

Currently I use:

 

 

./QuartusProSetup-19.3.0.222-linux.run

--installdir /opt/intelFPGA_pro/19.3/

--mode unattended --unattendedmodeui none --accept_eula 1

--disable-components quartus_help,modelsim_ase,modelsim_ae,dsp_builder,aocl

 

 

 

 

 

 

 

 

 

 

 

0 Kudos
6 Replies
JoEl
New Contributor I
80 Views

Hi OHarb1,

as of I know you can install just one device/family needed (ie you dont need cyclon/stratix/agilex devices, this can save few gigs) : \intelFPGA_pro\19.3\quartus\common\devinfo\cyclone10gx -then few of 20nm familysince you use just one...

 

PS: Might I ask question? we want to work with similar device, how full your design is? Durration 3,5 hour seems like our old design with 10AX48 (Arria10 480) which is approx. half of resources but it was filled more than 60% of logic and almost all memory blocks.

OHarb1
Novice
80 Views

I'm cooking a new Docker image now with only Arria devices and I also excluded something called "devinfo"(I don't know what it does, couldn't find anything on Google about it).

 

Our design is currently ~40% full for this Arria 10 part and this is with a VERY low fMax constraint.

 

Before I start to try to push our design, I want the P&R in the cloud process to be optimized.

 

 

OHarb1
Novice
80 Views

With "--disable-components quartus_help,devinfo,agilex,cyclone10gx,stratix10,modelsim_ase,modelsim_ae,hls,dsp_builder,aocl", I get a 62GByte image. That's still enormous.

 

 

Odd....

 

Even though I didn't exclude arria10, I get the error message below.

 

Is it because "devinfo" is required?

 

 

Step #2: Info: Analyzing source files

Step #2: Error (19273): Family Arria 10 is not installed

Step #2: Error: Flow failed: ERROR: Current design not found

Step #2:

 

JoEl
New Contributor I
80 Views

Probably yes, devinfo is device information needed for Quartus and contain information about devices used - as I wrote before, I think you can get rid of few but not all...

OHarb1
Novice
80 Views

Note that I'm referring specifically to the components(arguments) that can be passed to --disable-components option. I added "devinfo" to the list of components to be disabled, but I did not add "arria10".

 

 

OHarb1
Novice
80 Views

Oops.... I discovered that I didn't delete the setup folder where I extracted all the Quartus install files.... I'm trying out what effect removing that will have, hopefully I can get a docker image in the 10-20GByte size.

 

Other than that I rummaged through the Quartus install folders. I don't think I need the "nios2eds" folder in bold but there doesn't appear to be an installation option to exclude it, so I will try to delete them to see what happens.

 

/opt/intelFPGA_pro/19.3# du -hs * | sort -h

[deleted]

46M qsys

3.3G ip

3.7G nios2eds

7.6G quartus

/opt/intelFPGA_pro/19.3# cd quartus/

/opt/intelFPGA_pro/19.3/quartus# du -hs * | sort -h

[deleted]

47M sopc_builder

57M dspba

84M libraries

2.1G common

2.1G linux64

3.3G eda

/opt/intelFPGA_pro/19.3/quartus# cd common/

/opt/intelFPGA_pro/19.3/quartus/common# du -hs * | sort -h

[deleted]

2.0G devinfo

 

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