Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Testbench Generation?????

Altera_Forum
Honored Contributor II
‎01-03-2011 09:24 PM
1,311 Views

Hi everybody! 

I'm interested in simulation of vhdl-projects. And I have read that there is a possibility to generate testbench in ModelSim automatically. If somebody used testbench generation, can you answer:is generated testbench written with VHDL or tcl ? 

OR I will be glad if you give me some references to automatic testbench generation. 

 

Thank you in advance:)
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Altera_Forum
Honored Contributor II
‎01-04-2011 01:02 AM
300 Views

Hi There.. 

 

try read this thread : http://www.alteraforum.com/forum/showthread.php?p=92866 (http://www.alteraforum.com/forum/showthread.php?p=92866) 

 

Hope it can help you...
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Altera_Forum
Honored Contributor II
‎01-04-2011 11:01 AM
300 Views

Thanks a lot)

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