Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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The Quartus Prime software quit unexpectedly

Sohail
Beginner
2,368 Views

Problem Details
Error:
Internal Error: Sub-system: EMIF, File: /quartus/periph/emif/emif_gen6_emif_system.cpp, Line: 901

obuf_src_oterm
Stack Trace:
  Quartus          0x79d50: EMIF_GEN6_EMIF_SYSTEM::add_dm_dq_requirements + 0x1240 (periph_emif)
  Quartus          0x7783e: EMIF_GEN6_EMIF_SYSTEM::add_requirements_to_cells + 0x56e (periph_emif)
  Quartus          0x74d1c: EMIF_GEN6_EMIF_SYSTEM::create_emif_cells + 0x34c (periph_emif)
  Quartus          0x25cd6: EMIF_GEN6::create_design + 0x596 (periph_emif)
  Quartus          0x17267: std::_Func_impl<<lambda_6a734b9f6e407e6c10ea1408a2172c70>,std::allocator<int>,bool,PCC_MODULE * __ptr64>::_Do_call + 0x27 (periph_pcc)
  Quartus          0x118d0: PCC_ENV_IMPL::perform_op + 0x550 (periph_pcc)
  Quartus          0x11c4c: PCC_ENV_IMPL::create_design + 0x20c (periph_pcc)
  Quartus          0x1347e: PCC_ENV_IMPL::refresh_design_until_converged + 0x56e (periph_pcc)
  Quartus          0xaa40b: PCC_PERIPH_FLOW::pre_plan_blueprint_flow + 0x36b (periph_pcc)
  Quartus          0x13585: fit2_fit_plan + 0x2b5 (comp_fit2)
  Quartus          0x16442: TclNRRunCallbacks + 0x62 (tcl86)
  Quartus          0x17c4d: TclEvalEx + 0x9ed (tcl86)
  Quartus          0xa6a8b: Tcl_FSEvalFileEx + 0x22b (tcl86)
  Quartus          0xa5136: Tcl_EvalFile + 0x36 (tcl86)
  Quartus          0x15246: qexe_evaluate_tcl_script + 0x4e6 (comp_qexe)
  Quartus          0x1413b: qexe_do_tcl + 0x46b (comp_qexe)
  Quartus          0x1a70e: qexe_run_tcl_option + 0x5ee (comp_qexe)
  Quartus          0x146b1: QCU::DETAIL::intialise_qhd_and_run_qexe + 0xa1 (comp_qcu)
  Quartus          0x1f8d2: qcu_run_tcl_option + 0x2f2 (comp_qcu)
  Quartus          0x1a00b: qexe_run + 0x3eb (comp_qexe)
  Quartus          0x1b14a: qexe_standard_main + 0x26a (comp_qexe)
  Quartus           0x1fd2: qfit2_main + 0x82 (quartus_fit)
  Quartus          0x167e8: msg_main_thread + 0x18 (CCL_MSG)
  Quartus          0x17001: msg_thread_wrapper + 0x71 (CCL_MSG)
  Quartus          0x21610: mem_thread_wrapper + 0x70 (ccl_mem)
  Quartus          0x14b7d: msg_exe_main + 0x20d (CCL_MSG)
  Quartus           0x2bc8: __scrt_common_main_seh + 0x11c (quartus_fit)
  Quartus          0x17033: BaseThreadInitThunk + 0x13 (KERNEL32)
  Quartus          0x4d0d0: RtlUserThreadStart + 0x20 (ntdll)
 
End-trace


Executable: qpro
Comment:
None

System Information
Platform: windows64
OS name: Windows 10
OS version: 10.0

Quartus Prime Information
Address bits: 64
Version: 20.3.0
Build: 158
Edition: Pro Edition

 

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6 Replies
BoonT_Intel
Moderator
2,351 Views

Hi Sir,

Seem like this is happening in the older version 18.0. Can you give it a try on the latest version? (19.1 onward).




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Sohail
Beginner
2,348 Views

I am using Quartus Prime Version 20.3 Build 158 09/24/2020. Is there another build since 9/24/2020 which I can use? 

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BoonT_Intel
Moderator
2,339 Views

Hi Sir,

20.3 is the latest version. I am sorry, maybe I see wrongly that you are using 18.0 previously.

In this case, can you give a try to generate the example design, run compilation, and see if you getting the same error?

Otherwise, can you give me the steps to duplicate the error? or provide your design that behaves the error?


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Sohail
Beginner
2,334 Views

 

I am not sure what you mean by example design. Can you please give more details about this example design?

Is there a way to speed up communication between the two of us? Can we do a phone/chat/video  call? It takes 24 hour to get an answer.

 

If I have to send you the design to you, what format do you want it? Please advise on speeding up communication.

 

Thanks

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BoonT_Intel
Moderator
2,323 Views

Hi Sir,

I PM’ed you to ask for your contact so that I can contact you before I off starting today until the end of next week. But unable to get your reply. So, let me try to respond to you here.

The example design that I mentioned is the EMIF example design (ED). I am suspecting this because the IE (internal error) comes from the EMIF IP. So, I assume you have the EMIF (ddr4) ip in your design right? So, I am asking you to generate the emif ED and compile it to see if you also see the same error.

I tried the EMIF compilation at my side and I can’t see the IE.

So, I suspect the IE only happens in your design which maybe has some illegal connection. Thus, you can compare your design vs the ED. See if you export all the interface signals to the top-level (to external I/O). and also the local interface signal (amm_* -avalon-memory mapped signal) to the user logic (or any driver like nios processor).

Hench, please try with my suggestions as above. If the issue still persists, you can archive the design to .qar format (in quartus, go to project tab, archive project). Then zip the .qar file (because qar format is not allowed to attach in the forum). I will look into your design when I got the chance to online.


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BoonT_Intel
Moderator
2,292 Views

Hi Sir,

Is the issue still valid?


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