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Quartus prime pro 21.1 crashed during place stage, and the following message is in internal error report. Could anyone help to solve this problem?
Problem Details
Error:
Internal Error: Sub-system: STA, File: /quartus/tsm/sta/sta_tq2_crpr.cpp, Line: 1046
result.sector_node_leaf_pair() == sector_info
Stack Trace:
Quartus 0x442f1d: STA_TQ2_CRPR::adjusted_crpr_source(STA_CRPR_BPS) [clone .cold.456] + 0x434 (tsm_sta)
Quartus 0x3da719: STA_TRAVERSAL_MANAGER::create_arrival_tag_for_input_port(STA_TRAVERSAL_SPEC*, STA_NODE*, STA_CLOCK_DOMAIN const*) [clone .cold.2106] + 0x12b (tsm_sta)
Quartus 0x3da57c: STA_TRAVERSAL_MANAGER::create_arrival_tags_for_input_port(STA_TRAVERSAL_SPEC*, STA_NODE*) [clone .cold.2105] + 0x7c (tsm_sta)
Quartus 0x4daae3: STA_TRAVERSAL_MANAGER::create_arrival_tags_for_startpoint(STA_NODE*) + 0x103 (tsm_sta)
Quartus 0x4d9fe8: STA_TRAVERSAL_MANAGER::propagate_arrival_tags_to_node_internal(STA_NODE*, bool, bool) + 0x5c8 (tsm_sta)
Quartus 0x3fbc25: void STA_TRAVERSAL_MANAGER::propagate_clock_and_arrival_tags_from_node<QTL::FeederProxy<10, STA_NODE*>, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*)#1}>(STA_NODE*, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*)#1}&, QTL::FeederProxy<10, STA_NODE*>&) + 0x77 (tsm_sta)
Quartus 0x3fbf7d: void QTL::parallel_do_chunked_no_serial_attempt<10, boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}>(boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5})::{lambda(QTL::TBB_ITEM_GROUP<STA_NODE*, 10>, tbb::interface9::parallel_do_feeder<QTL::TBB_ITEM_GROUP>&)#1}::operator()(QTL::TBB_ITEM_GROUP, tbb::interface9::parallel_do_feeder<QTL::TBB_ITEM_GROUP>) const + 0x63 (tsm_sta)
Quartus 0x5d1b48: tbb::interface9::internal::do_iteration_task_iter<std::move_iterator<QTL::TBB_ITEM_GROUP<STA_NODE*, 10>*>, void QTL::parallel_do_chunked_no_serial_attempt<10, boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}>(boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5})::{lambda(QTL::TBB_ITEM_GROUP<STA_NODE*, 10>, tbb::interface9::parallel_do_feeder<QTL::TBB_ITEM_GROUP<STA_NODE*, 10> >&)#1}, QTL::TBB_ITEM_GROUP<STA_NODE*, 10> >::execute() + 0x38 (tsm_sta)
Quartus 0x27166: tbb::internal::custom_scheduler<tbb::internal::IntelSchedulerTraits>::local_wait_for_all(tbb::task&, tbb::task*) + 0x536 (tbb)
Quartus 0x5cc6c7: tbb::interface9::internal::do_group_task_input<void QTL::parallel_do_chunked_no_serial_attempt<10, boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}>(boost::iterators::filter_iterator<STA_GRAPH::STARTPOINT_PRED, __gnu_cxx::__normal_iterator<STA_NODE**, std::vector<STA_NODE*, std::allocator<STA_NODE*> > > >, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5}, STA_TRAVERSAL_MANAGER::propagate_arrival_tags()::{lambda(STA_NODE*, QTL::FeederProxy<10, STA_NODE*>&)#5})::{lambda(QTL::TBB_ITEM_GROUP<STA_NODE*, 10>, tbb::interface9::parallel_do_feeder<QTL::TBB_ITEM_GROUP>&)#1}, QTL::TBB_ITEM_GROUP>::execute() + 0xd7 (tsm_sta)
Quartus 0x27166: tbb::internal::custom_scheduler<tbb::internal::IntelSchedulerTraits>::local_wait_for_all(tbb::task&, tbb::task*) + 0x536 (tbb)
Quartus 0x1fd68: tbb::internal::arena::process(tbb::internal::generic_scheduler&) + 0x1e8 (tbb)
Quartus 0x1e85b: tbb::internal::market::process(rml::job&) + 0x1b (tbb)
Quartus 0x1aad5: tbb::internal::rml::private_worker::run() + 0x65 (tbb)
Quartus 0x1ad19: tbb::internal::rml::private_worker::thread_routine(void*) + 0x9 (tbb)
System 0x7e65: start_thread + 0xc5 (pthread)
System 0xfe88d: clone + 0x6d (c)
End-trace
Executable: quartus
Comment:
None
System Information
Platform: linux64
OS name: CentOS Linux
OS version: 7
Quartus Prime Information
Address bits: 64
Version: 21.1.0
Build: 169
Edition: Pro Edition
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Hi Po,
Is it possible for you to share and attach the qar here for me to replicate it (small test case that replicate the error if cannot give the full design) ?
Seem to me like a Quartus issue (likely a bug)
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Hi SyafieqS,
Sorry, I couldn't share the project to you because it contains our confidential ip.
I found that Quartus pro would optimize our clock divider in two different ways, which are shown as follows:
(a) (b)
When I set timing constraints to the output of clock divider in fig. (a), like "get_pins {u_sys0_div2|pos_clk_r_0|q}", Quartus pro would crash.
On the other hand, if I set timing constraints to the output of clock divider in fig. (b), like "get_pins {u_sys0_div2|div_clk_1_u_i_m2_cZ|combout}", Quartus pro would synthesis the design successfully.
I would like to know how I make Quartus pro to optimize my project like fig. (b).
May I have any advice about this issue, please?
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Hi Po,
Noted. I am checking this internally and will you know any update.
If you are able to provide small toy design that replicate the issue, that would be better.
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Hi Po,
May I know if there is any update from my previous reply?
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We do not receive any response from you to the previous reply that I have provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.
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Hi Po,
This is a real bug and hopefully you can provide a small test design that replicate the issue. For the private IP, you can blackbox it. You can reply email to me if don't want to attach it here.
Alternatively, you can keep your design files private for security reasons (confidential IPs), you can use the Quartus® II database to send someone your full compilation results without sending your source design files.
You may refer to KDB below on how to create a database without sharing your source code.
https://www.intel.com/content/www/us/en/support/programmable/articles/000076181.html
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Hi Po,
May I know if there is any update from my previous reply?
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