The device was not created with a DEV_PART_ENUM

Altera_Forum · ‎07-07-2011

Hello,

I'm kind of a new user of Altera's FPGAs. I'm trying to generate a Qsys system to run on an Intel Atom E6x5 which has a Altera FPGA Arria II GX, in particular it has the EP2AGXE6XXFPGA. I'm using Quartus II 11.0.

What I did:

I created a project according to the instructions in:

IP Compiler for PCI Express: User Guide - chapter 17

I can create and simulate the project but when I come to the compilation stage Quartus gives an internal error (I'm attaching it below).

If someone knows how to solve this or has a working example that could provide to me it would be very useful.

Thanks,

Frederico

---------------------------------------------------------------------------------------------------------

Internal Error: Sub-system: DMGR, File: /quartus/ddb/dmgr/dmgr_utility_body.cpp, Line: 483

The device was not created with a DEV_PART_ENUM.

Stack Trace:

0x1cb8e: DMGR_UTILITY_BODY::load_timing_info() + 0x4a (ddb_dmgr)

0x1cbd7: DMGR_UTILITY::load_timing_info() + 0x1d (ddb_dmgr)

0x1234a0: RBC_HSSI_UTIL::get_piranha_hssi_pcs_pma_effective_datarate_common(bool, CDB_CDR_PROTOCOL_HINT_ENUM, bool, bool, bool, unsigned int, bool, bool, _Dinkum_std::vector<_Dinkum_std::pair<BIG_TIME, BIG_TIME>, MEM_STL_ALLOCATOR<_Dinkum_std::pair<BIG_TIME, BIG_TIME> > >*) + 0xae (db_rbc)

0x1271e2: rbc_get_tgx_hssi_tx_pcs_pma_effective_datarate_tgx_hssi_config_legal_values + 0x408 (db_rbc)

0x7e1ff7: cal_rbc_tgx_hssi_tx_pcs_pma_effective_datarate_tgx_hssi_config(RBCGEN_FLOW_TYPE_ENUM, RBC_TGX_HSSI_TX_PCS_PMA_EFFECTIVE_DATARATE_TGX_HSSI_CONFIG_PARAM_STRUCT const&, RBC_TGX_HSSI_TX_PCS_PMA_EFFECTIVE_DATARATE_TGX_HSSI_CONFIG_ACF_STRUCT const&, RBC_TGX_HSSI_TX_PCS_PMA_EFFECTIVE_DATARATE_TGX_HSSI_CONFIG_PORT_STRUCT const&, RBC_TGX_HSSI_TX_PCS_PMA_EFFECTIVE_DATARATE_TGX_HSSI_CONFIG_INI_STRUCT const&, RBC_TGX_HSSI_TX_PCS_PMA_EFFECTIVE_DATARATE_TGX_HSSI_CONFIG_CPT_STRUCT const&, _Dinkum_std::vector<_Dinkum_std::pair<BIG_TIME, BIG_TIME>, MEM_STL_ALLOCATOR<_Dinkum_std::pair<BIG_TIME, BIG_TIME> > >*) + 0x10f (db_cal_generic)

0x951a10: cal_get_tgx_hssi_tx_pcs_pma_effective_datarate_tgx_hssi_config_legal_values + 0xbd8 (db_cal_generic)

0xb949ba: cal_is_tgx_hssi_tx_pcs_pma_effective_datarate_tgx_hssi_config_legal(RBCGEN_FLOW_TYPE_ENUM, CDB_ATOM_NODE*) + 0x1f8e (db_cal_generic)

0x16ec5de: cal_generic_is_atom_legal + 0x2a48 (db_cal_generic)

0xba5: cal_is_atom_legal + 0x63 (db_cal)

0x400337: CUT_ATOM_LEGALITY_IMPL::check_atom(CDB_ATOM_NODE*, RBCGEN_FLOW_TYPE_ENUM) + 0x397 (db_cut)

0x4b455e: cut_legality_check_atom_netlist(CMP_FACADE*, CDB_ATOM_NETLIST*, bool*, bool, bool) + 0x39e (db_cut)

0x79b77: AMERGE_MERGER_OP::perform_post_merge_operations() + 0x154b (atm_amerge)

0x7aed3: amerge_combine_netlist(CMP_FACADE*, bool, bool*) + 0x351 (atm_amerge)

0x7b249: amerge_mini_merge + 0x2b (atm_amerge)

0x2c218: QSYN_FRAMEWORK::do_mini_merge(CMP_FACADE*) + 0x3d8 (quartus_map)

0x2fc9f: QSYN_FRAMEWORK::write_qic_databases(bool) + 0xc7f (quartus_map)

0x301c5: QSYN_FRAMEWORK::write_databases(bool) + 0xf5 (quartus_map)

0x1211f: qexe_do_normal(QEXE_FRAMEWORK*, char const*) + 0x23b (comp_qexe)

0x19c6d: qexe_standard_main(QEXE_FRAMEWORK*, QEXE_OPTION_DEFINITION const**, int, char const**) + 0x437 (comp_qexe)

0x20f8b: qsyn_main(int, char const**) + 0x9b (quartus_map)

0x1ba98: msg_main_thread(void*) + 0x18 (ccl_msg)

0x58a8: thr_final_wrapper + 0xe (ccl_thr)

0x1d1e6: msg_thread_wrapper(void* (*)(void*), void*) + 0x72 (ccl_msg)

0x64100: mem_thread_wrapper(void* (*)(void*), void*) + 0xd0 (quartus_map)

0x9b20: err_thread_wrapper(void* (*)(void*), void*) + 0x2a (ccl_err)

0x58db: thr_thread_wrapper + 0x2f (ccl_thr)

0x2eec1: msg_exe_main(int, char const**, int (*)(int, char const**)) + 0x97 (ccl_msg)

0x1489f: main + 0x4f (quartus_map)

0x16c0e: __libc_start_main + 0xfe (c.so.6)

End-trace

Quartus II Version 11.0 Build 157 04/27/2011 SJ Full Version

Service Pack Installed: 0.14

Altera_Forum · ‎07-08-2011

Hello,

I found out that the error is related with the patch provided in Intel's webpage (which seems to be an Altera's patch)

wwwintelcom /p/en_US/embedded/hwsw/hardware/atom-e6x5c/software

This patch must be installed in order to add the correct device Arria II GX EP2AGXE6XXFPGA, otherwise it doesn't appear in Quartus. Thus without it I'm not able to make a project for that device.

However, if I run a project for a different device, like the ones provided in:

wwwalterawikicom /wiki/PCI_Express_in_Qsys_Example_Designs

before applying the patch I don't get any error. But after applying the patch I get the error that I've in the previous post and also sometimes I get another error, something related with not finding EP1S80F1020C7_HARDCOPY_FPGA_PROTOTYPE

I'm pretty sure it is some problem with the patch for linux platforms. I'm not sure if this is true for windows, I'm going to try it.

If someone has a solution for this problem I would really appreciate.

Thanks,

Frederico

Altera_Forum · ‎07-08-2011

occasionally there are problems when not all devices have been installed, this might be the case here

i think this might be the first Atom SR I've seen here. you might try contacting Intel support if you can't figure it out

Altera_Forum · ‎07-09-2011

Hi thepancake,

Thanks for your reply. I tried reinstalling Quartus II from scratch with the complete device library, but it still has the same problem, before applying the patch everything goes ok, after I get the errors when trying to compile.

Frederico

Altera_Forum · ‎07-13-2011

Good news:

The compilation bugs are solved with the installation of the newest Quartus II 11.0 Service Pack 1.

Best,

Frederico