Top level entity has multiple architectures. How to configure/select?

[c-thaler]

I have a Quartus VHDL project that I use for trial synthesis, just to get a quick overview of timing and resource usage.

Is there a way in Quartus to select/configure the architecture for the top level entity in a VHDL project?

Or do I have to remove the unused architecture files? (Architecture and entity descriptions are in separate files.)

[SyafieqS · Accepted solution]

Is there a way in Quartus to select/configure the architecture for the top level entity in a VHDL project?

- I would say NO, In Quartus, the architecture for the top-level entity in a VHDL project is determined by the synthesis and optimization processes rather than through explicit configuration within the software itself. Therefore, there is no direct way to select or configure the architecture for the top-level entity in Quartus.

Or do I have to remove the unused architecture files? (Architecture and entity descriptions are in separate files.)

- If you have multiple architecture files for the top-level entity in your project, Quartus will analyze and synthesize each architecture separately. It will then choose the one that best meets the design requirements and constraints.

[ShengN_Intel]

Hi,

Any further update or concern?

Thanks,

Best Regards,

Sheng

[c-thaler]

I will move the architectures to separate files then and include only one of them in my project.

Thanks!

[SyafieqS]

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