UniPHY DDR3 controller in Arria V: How to get a quad-rate interface?

[Altera_Forum]

Hi there 

 I'm currently trying to implement a DDR3 interface (16 bit @ 533 MHz DDR, UniPHY, hard-macro controller) with Qsys, targeted to an Arria V device.  As I learned from Qsys, the Arria V hard-macro controller is only capable of providing a full-rate user interface (32 bit @ 533 MHz).   I also learned that you can get a half-rate interface (64 bit @ 266 MHz) by choosing a width of 64 bit at the "Multiple Port Front End" configuration and connecting the half-rate clock provided by the DDR3 SDRAM controller (afi_clk_half) to the read, write and command fifo clock input ports of the DDR3 SDRAM controller.  Now, what I'd like to get is a quad-rate interface (128 bit @ 133 MHz) in order to relax timing on the Qsys interconnect.  Here are my questions:  - Is there a way to do this without instantiating an Avalon MM DDR Memory Half Rate Bridge? - Is there a way to have the quad-rate clock (133 MHz) generated by the PLL instantiated inside the DDR3 SDRAM memory controller? So far I only see full-rate and half-rate clock outputs. - If not, what would be the best strategy to generate the quad-rate clock?  Thanks in advance, Marc

[Altera_Forum]

i only remember seeing quad-rate support for Stratix V, probably for the 800-1066 MHz controllers 

 i think you'll have to use a half-rate bridge (i haven't used it) or write your own logic to do it

[Altera_Forum]

A5 only supports half.

[Altera_Forum]

Quartus 12 SP2 supports the DDR3 UniPhy quarter rate Soft (not Hard) controller. Download SP2 to get it. It's supposed to be able to do 450 Mhz Fclk with a C6.  

 We have managed to instantiate the controller ok. Next step is to increase it in size from 16 bits to 64 bits wide (for us 64 bits DDR with Fclk = 400 Mhz, and FPGA side interface of 512 bits at 100 MHz).    More specifically - we want a 2 port approach, one port for the NIOS processor (can be any width, and any speed), and a high speed 512 bit wide port running at 78 MHz). I have not been able to figure out how to make the Megawizard do this. If any one has pointers on how to achieve this in an Arria V, I would be grateful for any help.