When building a set of OpenCL kernels for a FPGA device, aocl produces some info about the logic utilization in the file acl_quartus.txt which looks as follows:
(I built for the SocratesII board with a Cyclone V FPGA)
--- Quote Start ---
ALUTs: 27730
Registers: 53,822
Logic utilization: 25,166 / 41,910 ( 60 % )
I/O pins: 125 / 342 ( 37 % )
DSP blocks: 0 / 112 ( 0 % )
Memory bits: 248,280 / 5,662,720 ( 4 % )
RAM blocks: 230 / 553 ( 42 % )
Actual clock freq: 112.579999864
Kernel fmax: 112.58
1x clock fmax: 112.58
2x clock fmax: 10000
Highest non-global fanout: 4233
--- Quote End ---
I have a vague Idea what they may mean, but since I come from a software (not hardware) background, some of it is a bit confusing, especially as no units are given.
- ALUTs and Registers seem obvious, although I'm not sure if one register holds one or multiple bits.
- I assume the clock frequency is in MHz, but it would seem a bit much for "2x clock fmax" whatever that may be.
- What is the unit for logic utilization? I'm using 25,166 / 41,910 of what exactly?
Supposedly this System has 110000 Logic elements.
