Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Unused VHDL entity ports in Quartus

Altera_Forum
Honored Contributor II
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Hello, 

 

Is there a Quartus synthesis report that lists unused entity ports ?
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Altera_Forum
Honored Contributor II
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It will only tell you what logic has been removed, not the specific entity port names as these may have been renamed/merged during synthesis. 

At the top level it should tell you whats missing though.
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