the Testbench Template Writer of Quartus works fine. But it just works fine if it is used inside a project.
Is there any way to generate a testbench template for just any vhdl file (without the need to create a project first) ?
Using cmd line quartus_eda cmd also asks me to pass a project...
in the pdf I can´t find what I´m looking for.
There are a lot of information about testbenches for qsys files.
What I want to know is: Is there a way to use the Testbench Template Writer for a single source file without the need to create a project?