Warning(16226): One or more registers failed to be packed into a DSP bank ...

[SShiv1]

could you please send me the updated template as early as possible.

[Nooraini_Y_Intel]

Hi,

Is this thread is the same issue/request as in the following thread link? If this is the not same thread, please of provide details/steps on this issue(error) replication.

https://forums.intel.com/s/question/0D50P0000476TgTSAU/adder-is-not-packed-into-a-dsp-block-in-1st280ey2f55e2lgs1-fpga?t=1544024594670

Regards,

Nooraini

[CheePin_C_Intel]

​Hi,

I believe this register packing issue is due to the same reason as the forum:

https://forums.intel.com/s/question/0D50P0000476TgTSAU/adder-is-not-packed-into-a-dsp-block-in-1st280ey2f55e2lgs1-fpga?t=1544071243898

You may refer to the above forum ie to use Native DSP IP or the S10 DSP template to pack the register into DSP bank.

Thank you very much.

Chee Pin