Warning: Converted elements in bus name "" using legacy naming rules.

[Altera_Forum]

I have a module symbol on my top level block diagram/schematic connected to a few input and output buses. When I compile I always get the the warning "converted elements in bus ... name using legacy naming rules". I only get the warning for the input buses not output buses :confused:. 

 I have checked the Altera help files about the warnings and it says that there are two naming schemes for BDF. Quartus II 7.1 and earlier use the the older naming scheme which doesn't support x[] for split buses while QuartusII 7.2 and up does.  In the Altera help files the given solution was to save the BDF as type "Block Diagram/Schematic File Using Quartus II naming rules". I have tried this and it makes no difference.  I am using Quartus II 10.1 web edition and previously had 10. I have tried uninstalling and reinstalling Quartus II 10.1 but still no difference :confused::mad::confused:.

[Altera_Forum]

Same happened to me. 

 Go to Assignments -> Settings -> Analysis and Synthesis Settings -> More Settings  Go to Block Design Naming and change value from Auto to Quartus II  that solved for me.  []s

[Altera_Forum]

Hello 

 I based a very simple BDF design on an automatically generated project by the Terrassic system builder. The connections to the LEDR[x] and KEY[0] were not compiled correctly until I followed the setting above. In Q17 the settings have moved to: Assignments / Settings / Compiler Setting / Advanced Settings (Synthesis) [button] / Block Design Naming { => set this to Quartus II}  Best Regards, John.