Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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When I use the pin planner to drag the signal to the positive pin of a diff tx pair, the planner arbitrarily assigns an unrelated signal to the negative pin of the pair.

MPogo1
Beginner
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Using Quartus II v8.0 with EP3SL50F484. I have an 8bit output bus in my project that is assigned to LVDS. When I use the pin planner to drag the signal to the positive pin of a diff tx pair, the planner arbitrarily assigns an unrelated signal to the negative pin of the pair.

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Rahul_S_Intel1
Employee
113 Views

Hi ,

I am really sorry to inform you that, I do not have access to Quartus 8.0 to check from myside and dont have the data base also .

As per me if possible can you try to manually assign the pin in Qsf file.

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