Why Quartus Prime Standard Edition ignores XCVR_REFCLK_PIN_TERMINATION assignment

[Altera_Forum]

Hi, 

I am trying to find error in design using Arria 10 transceivers and during the analysis of the Fitter report I found, that according to the ignored Assignments sheet, all XCVR_REFCLK_PIN_TERMINATION were ignored.   The ignored assignment from QSF file: set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to clock_ref_135_mhz  Other assignment for the clock: set_location_assignment PIN_L22 -to clock_ref_135_mhz set_location_assignment PIN_L21 -to "clock_ref_135_mhz(n)" set_instance_assignment -name IO_STANDARD LVDS -to clock_ref_135_mhz  Device assignment: set_global_assignment -name DEVICE 10AX016E4F27E3SG  Pins L22 and L21 corresponds the transceiver reference clock.  If I use different value than AC_COUPLING than assignment is processed (do not appear in ignored assignments report). I tried to specify the assignment through both Pin planner or QSF file and both cases behaves in the same way.   I would like to know, why is the XCVR_REFCLK_PIN_TERMINATION ignored?  Thank you very much Jan

[Altera_Forum]

Hi, 

 XCVR_REFCLK_PIN_TERMINATION is ignored because this setting is no longer applicable to Arria 10 Device.  For Arria 10 XCVR, the correct XCVR refclk setting is XCVR_A10_REFCLK_TERM_TRISTATE. The setting can accept 2 value.  XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF is used for AC coupled reference clock inputs XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_ON is used for DC coupled reference clock inputs   You can always refer to Arria 10 Transceiver PHY User Guide doc to find out more on the correct setting implementation. https://www.altera.com/documentation/nik1398707230472.html  Thanks.  Regards, spdl2001 (This message was posted on behalf of Intel Corporation)