Why Quartus Prime crashes when I try to early floorplan a design using Design Partitions and logiclock regions?

[MRigh4]

When I launch the Analysis and Synthesis process in a design with a certain number of partitions and relevant logiclock regions, Quartus Prime shows an error message with the attached problem description and crashes.

Target device: 10AX066K4F35I3SG

Quartus Prime version: Quartus Prime Standard Edition 19.1

OS: Windows 10

[KhaiChein_Y_Intel]

Hi,

Can you share the design file for investigation?

Thanks.

Best regards,

KhaiY

[MRigh4]

Hello KhaiY_Intel,

unfortunately I can't share the design file due to company restrictions, but it seems that the problem is in the parallel compilation feature, since disabling it in the QSF file ( setting set_global_assignment -name NUM_PARALLEL_PROCESSORS 1) , the analysis and synthesis process runs successfully.

[KhaiChein_Y_Intel]

Hi,

It is glad that you found a root cause. You may disabling this feature in the QSF as a temporary workaround. I understand that providing the full design is not possible. Is it possible to provide a simple test case for error replication? If I can reproduce the error, I will send it to engineering team for a fix in the future release.

Thanks.

Best regards,

KhaiY

[KhaiChein_Y_Intel]

Hi,

I’m glad that the error is fixed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best regards,

KhaiY

[MRigh4]

Thank you,

I tried to replicate the problem with a simpler case, but it required me too much time and unfortunately I can't spend it right now. If it's possible I will try it in the future.

[KhaiChein_Y_Intel]

Hi,

Sure. You may open a new forum thread if you can replicate the problem with a simpler case. Thank you so much for the effort as this helps to improve our software quality.

Best regards,

KhaiY