Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Why does SignalTap II Logic Analyzer display 'Program the device to continue' message even though the design was compiled with the latest SignalTap II file(.stp)?

SDmel
Beginner
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Tool used: Quartus prime pro edition 18.0

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7 Replies
AnandRaj_S_Intel
Employee
742 Views

Hi @SDmel​ 

 

  1. Which Quartus version & edition are you using.

Try follow the solution provided in links below

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd08272014_588.html

https://forums.intel.com/s/question/0D50P00003yyKkeSAE/program-device-seems-no-response-in-signaltap-after-changing-source-code

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

 

Regards

Anand

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SDmel
Beginner
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Hi Anand,

 

I am using Quartus 18.0 version.

 ./megafunctions folder is not created in my project folder.

 

Thanks and regards,

Shyna

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AnandRaj_S_Intel
Employee
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Hi Shyna,

 

  1. Are you using any development kit( Name it)?
  2. which edition of quartus Lite,std or pro?

Please share the Quartus log & images with error.

 

Regards

Anand

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SDmel
Beginner
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I am using custom board.

Quartus Prime Pro edition is used to generate sof and stp file.

 

Please find the attached image for error message.

 

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sstrell
Honored Contributor III
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As the message states, you need to program the device first with the .sof. Click the program button in the JTAG Configuration section on the right (button with little down arrow pointing to device). Just because you've compiled the design doesn't mean the design is running on the device. You have to program it first.

 

If you're saying that you have programmed the device and you are still seeing this error, try closing Signal Tap and manually program the device in the Quartus Programmer (Tools menu). Then reopen the .stp file and see if it's now working.

 

#iwork4intel

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SDmel
Beginner
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Both methods I tried still I am getting same error message

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AnandRaj_S_Intel
Employee
742 Views

​Hi,

 

Can you see the size difference in sof file before and after adding the stp file?

Have you enabled Signal-Tap Logic analyzer under setting?

 

Can you delete the db, increment db, signal-tap and sof files.

And recompile the design and create new signal tap with minimum signals and check.

 

Regards

Anand

 

 

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