Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17255 Discussions

Why i can't use CARRY&CARRY_SUM in QII11.1?

Altera_Forum
Honored Contributor II
2,504 Views

Hello Dears: 

 

I found i can use LCELL primitive in my project, but i can't use CARRY&CARRY_SUM primitive. My current QII version is 11.1+sp2. I remember i could use them in the old version. 

 

Also i found some words from the user guide as below: 

 

"■The cout port of the CARRY_SUM primitive can feed one or two  

cones of logic. If the CARRY_SUM primitive feeds two cones of logic,  

one and only one of the cones of logic must be buffered by another  

CARRY_SUM primitive. In this case, both cones of logic are  

implemented in the same logic cell. You must follow this rule to tie  

down the sum and carry-out functions for the first stage of an adder  

or counter. 

■ A cone of logic that feeds the cin port of a CARRY_SUM primitive can  

have up to two inputs. A third input is allowed only if it is a  

CARRY_SUM input or a q feedback from the register. 

■ The cout port of the CARRY_SUM primitive cannot feed an output  

pin. 

■ The cin port of the CARRY_SUM primitive cannot be fed by an input  

pin. 

■ The cout port of two different CARRY_SUM primitives cannot feed  

the same gate." 

 

I design my project follow above items exactly! I archived my project and attching here, anyone pls help to check it, thank you very much!!!
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
1,611 Views

 

--- Quote Start ---  

Hello Dears: 

 

I found i can use LCELL primitive in my project, but i can't use CARRY&CARRY_SUM primitive. My current QII version is 11.1+sp2. I remember i could use them in the old version. 

 

Also i found some words from the user guide as below: 

 

"■The cout port of the CARRY_SUM primitive can feed one or two  

cones of logic. If the CARRY_SUM primitive feeds two cones of logic,  

one and only one of the cones of logic must be buffered by another  

CARRY_SUM primitive. In this case, both cones of logic are  

implemented in the same logic cell. You must follow this rule to tie  

down the sum and carry-out functions for the first stage of an adder  

or counter. 

■ A cone of logic that feeds the cin port of a CARRY_SUM primitive can  

have up to two inputs. A third input is allowed only if it is a  

CARRY_SUM input or a q feedback from the register. 

■ The cout port of the CARRY_SUM primitive cannot feed an output  

pin. 

■ The cin port of the CARRY_SUM primitive cannot be fed by an input  

pin. 

■ The cout port of two different CARRY_SUM primitives cannot feed  

the same gate." 

 

I design my project follow above items exactly! I archived my project and attching here, anyone pls help to check it, thank you very much!!! 

--- Quote End ---  

 

 

It seems the primitive is optimized away, from attched JEP file! The sin is connected directly to sout!!!!
0 Kudos
Altera_Forum
Honored Contributor II
1,611 Views

Optimized away usually means your test design has no significant functionality that requires the respective resources. 

 

I didn't yet use carry and carry_sum primitive, but I think your design has connections that can't be mapped to real hardware. As far as I understand, CIN can't be driven by regular logic output and COUT can't drive an regular logic input. CIN and COUT can be connected to each other or must be left unconnected. 

 

Obligatory question with posts like this: What do you want to achieve?
0 Kudos
Altera_Forum
Honored Contributor II
1,611 Views

 

--- Quote Start ---  

Optimized away usually means your test design has no significant functionality that requires the respective resources. 

 

I didn't yet use carry and carry_sum primitive, but I think your design has connections that can't be mapped to real hardware. As far as I understand, CIN can't be driven by regular logic output and COUT can't drive an regular logic input. CIN and COUT can be connected to each other or must be left unconnected. 

 

Obligatory question with posts like this: What do you want to achieve? 

--- Quote End ---  

 

 

Assume there is a Carry chain, the first cin and the last cout must be floating according your comments? If it is true, how can i use the chain? becasue i must input my signal into this chain!!! Thanks for you reply, anyway!
0 Kudos
Altera_Forum
Honored Contributor II
1,611 Views

 

--- Quote Start ---  

Assume there is a Carry chain, the first cin and the last cout must be floating according your comments? If it is true, how can i use the chain? becasue i must input my signal into this chain!!! Thanks for you reply, anyway! 

--- Quote End ---  

 

Obviously, floating cout isn't a problem at all and will be usually observed at the end of a carry chain. 

 

Floating cin doesn't happen in real FPGA hardware. Consider that carry and carry_sum are abstract primitives that don't reflect exactly hardware properties. This causes some problems when describing actual hardware. The real hardware structure can be best seen in device manual and in the resource property editor. 

 

In real FPGA hardware, at the start of the carry chain there's an LE that doesn't use cin for the cout expression. If I remember right, it can be described in carry primitive terms with a constant input to cin. But as said, I didn't use the carry primitives yet.
0 Kudos
Reply