I am learning to use partial reconfiguration. I used the example HERE. I followed the instruction step by step, and end up with no .rbf file generated. For example, for the revision of hpr_parent_slow_child_default, I got the hpr_parent_slow_child_default.sof instead of .rbf file. I also tried to add tcl command `set_global_assignment -name GENERATE_PR_RBF_FILE ON` in .qsf file. It didn't work either. It suppose to generate the .rbf file at the end of compilation according to the document. I cannot figure out why it did not. Is there anybody has experience on this problem?
I am using a stratix 10 GX devkit, and Quartus Prime Pro 18.1.
Thanks a lot!
I read the simulation log carefully again. I just found that there is a critical warning:
"Compilation Report contains advance information. Specifications for device 1sg280hu2f50e2vg are subject to change. Contact Intel for information on availability. No partial reconfiguration programming files will be generated."
I would like to know if that means my devkit cannot do partial configuration?
Assuming you are talking about the HPR tutorial described in AN826, try compiling the final files that would be in the hpr directory here: https://github.com/intel/fpga-partial-reconfig/tree/master/tutorials/s10_pcie_devkit_blinking_led_hp... and see if that works. The target device part number should be 1SG280HU2F50E2VGS1 which is set correctly in the .qsf file there but doesn't match what you say is shown in the critical warning message.