Working on a Prototype

Altera_Forum · ‎01-07-2012

Hello all,

I am a second year engineering student, and I am considering using one of our DE2 boards to prototype a project involving ultrasonic range detection. I've had experience with several microcontroller families (PIC, TI MSP430's, etc.) and I have been collecting and absorbing docs, etc. to understand how Altera does things.

I've gotten to the point where I can load a NIOS II processor model onto the board successfully and I can make lights blink, whirlygigs whirl, etc. There are a couple of items that I have been unable to come up with answers to at this point. Perhaps some kind soul could point me in the right direction or offer assistance.

I am using the "DE2 Media Computer" reference design. I load it into Quartus II and compile - brings success.

I note first that the NIOS II design seems to be based on SOPC Builder? If I gather correctly, QSYS is supposed to be the latest NIOS II configuration and build system, which is supposed to replace SOPC Builder? If so, is there an updated reference design which makes use of QSYS instead of SOPC Builder? I did try opening the design in QSYS, and it upgrades/converts everything, but then comes up with 3 errors that I do not yet know how to solve.

Secondly, I note that when I compile in Quartus II, two different .sof files are produced: DE2_Media_Computer.sof and DE2_Media_Computer_time_limited.sof. Either one of them appears to load on the board successfully. The time limited version, of course, gives me a warning about how it will time out, etc. What is the difference in the two? Do I need a license in order to successfully run the DE2_Media_Computer.sof? Once I load either version, my next question comes up.

Thirdly, I would ultimately like to work in Eclipse with the NIOS II configuration to write my programs in c. The only way I have gotten this to work so far is to load the time limited version, leave Quartus II and the programmer running in the background, then fire up Eclipse and write/compile/load my programs, etc. If the programmer is not running, I receive an error about invalid system console whenever I try to load a program. Am I doing things in the correct fashion here?

Fourthly, when I begin looking at the example programs, etc. I can start to compile and load successfully on some of the simpler ones. Attempting to compile/run the test_Media_Computer example, in the file exceptions.c is a line which reads:

void the_reset (void) __attribute__ ((section (".reset")));

and appears to result in the error:

no memory region specified for loadable section '.reset'

So, again, is there a newer set of examples which fixes this issue, or can someone point me to a solution for this?

That's about it for now. Thank you for taking the time.

Altera_Forum · ‎01-09-2012

When you compile the project, you most probably only generate the time limited .sof. The other .sof file was probably the one distributed with the example.

When you upload your software through Eclipse, it first checks that the configuration in the FPGA matches the one from the SOPC project. So if you modified the design and recompiled it, the two .sof files will describe two different systems and the one that you compiled is the only one that matches what Eclipse expects.

Altera_Forum · ‎01-09-2012

Thank you for the response. I will check further into that. I obviously have a lot of ground to cover yet before I can consider myself fluent in these tools.