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about vhdl code for cic interpolation filter

Altera_Forum
Honored Contributor II
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i am attaching one pdf file based on cic filter.In the bitgrowth section the author has mentioned about the increase in the bits at the output stage .Suppose if i am writing a vhdl code for cic interpolation stage for example let differential delay M=1, Interpolation factor R=8,Input bit size be 23 and number of comb sections and integrator sections be N=9.Then how the output bit size change for each comb section.Can anybody explain me with the above mentioned parameters?

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Altera_Forum
Honored Contributor II
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according to given equation :for decimator, last comb output bits = 9 * log2(8*1) + 23 = 50 bits 

 

and it says, the same should be used at each comb or integrator stage. Leave truncation to final output. 

 

for interpolator: 

last stage = 23 + 9 -1 = 31 bits 

and stage before last requires 23+8-1 = 30 bits and so on
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

according to given equation :for decimator, last comb output bits = 9 * log2(8*1) + 23 = 50 bits 

 

and it says, the same should be used at each comb or integrator stage. Leave truncation to final output. 

 

for interpolator: 

last stage = 23 + 9 -1 = 31 bits 

and stage before last requires 23+8-1 = 30 bits and so on 

--- Quote End ---  

 

 

whether this increase in bits should be applied at each stage of comb and integrator section or only at end of each stage of comb section or only at end of each stage of integrator section
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Altera_Forum
Honored Contributor II
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For interpolating CIC I assume (from the wording of the document) that it applies to each stage(be it comb or integrator). You try it and tell us.

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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

For interpolating CIC I assume (from the wording of the document) that it applies to each stage(be it comb or integrator). You try it and tell us. 

--- Quote End ---  

 

 

After further work it turned out that my last statement needs correction. 

The best thing is run this matlab program and read (d): 

 

Bin = 23; %input width 

N = 9; %stages of comb or integrator 

M = 1; %differential delay 

R = 8; %interpolation rate 

 

%cic decimator at any stage 

Bout = N * log2(R*M) + Bin; 

 

%cic interpolator per ith stage  

%stages 1~N 

for i = 1:N 

G = 2^i; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

%N+1 ~ 2N stages 

for i = N+1:N*2 

G = (2^(2*N-1)*(R*M)^(i-N))/R; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

for i = 1:N*2 

fprintf('%i %i\r',i,d(i)); 

end
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

After further work it turned out that my last statement needs correction. 

The best thing is run this matlab program and read (d): 

 

Bin = 23; %input width 

N = 9; %stages of comb or integrator 

M = 1; %differential delay 

R = 8; %interpolation rate 

 

%cic decimator at any stage 

Bout = N * log2(R*M) + Bin; 

 

%cic interpolator per ith stage  

%stages 1~N 

for i = 1:N 

G = 2^i; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

%N+1 ~ 2N stages 

for i = N+1:N*2 

G = (2^(2*N-1)*(R*M)^(i-N))/R; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

for i = 1:N*2 

fprintf('%i %i\r',i,d(i)); 

end 

--- Quote End ---  

 

 

after checking the matlab code above the value of d is as below 

 

1 24 

2 25 

3 26 

4 27 

5 28 

6 29 

7 30 

8 31 

9 32 

10 40 

11 43 

12 46 

13 49 

14 52 

15 55 

16 58 

17 61 

18 64 

 

Now my question is with 23 bit input data how to write vhdl code so that the ouput data width is 24 and follows.Since addition of 2 23 bit input data as shown in the comb section of the cic interpolation is 23 bit data and if i specify output data widthto be 24 there will be syntax error while synthesizing the vhdl code that datatypes are not matching.Can you give solution for this problem?
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Altera_Forum
Honored Contributor II
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you need sign extend: 

 

data_24 <= std_logic_vector(resize(signed(data_23)),24) + resize(signed(data_23b)),24);
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

After further work it turned out that my last statement needs correction. 

The best thing is run this matlab program and read (d): 

--- Quote End ---  

 

The quoted paper doesn't explain the bit growth exactly, neither for decimation nor interpolation filters. Besides the Matlab tool, I would always refer to the original Hogenauer paper introducing CIC filters. Bit growth in the comb section of interploation filters is in fact simple, one bit per stage.
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

The quoted paper doesn't explain the bit growth exactly, neither for decimation nor interpolation filters. Besides the Matlab tool, I would always refer to the original Hogenauer paper introducing CIC filters. Bit growth in the comb section of interploation filters is in fact simple, one bit per stage. 

--- Quote End ---  

 

 

Thanks FvM.  

I assume the equations for bit growth given in attached doc look too involved to be wrongly typed from original source(Hogenauer's). 

But I did notice discrepancy of last equation when applied to i = N as Bout = Bin + N -1 

 

Anyway do you have access to Hogenauer's doc? or do you know where those given equations go wrong. 

I know Hogenauer also included method for register pruning to reduce bit growth by distributing quantisation noise across stages. Naturally too involved and too specialised corner and may be unwarranted with FPGAs applications.
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

Thanks FvM.  

I assume the equations for bit growth given in attached doc look too involved to be wrongly typed from original source(Hogenauer's). 

But I did notice discrepancy of last equation when applied to i = N as Bout = Bin + N -1 

 

Anyway do you have access to Hogenauer's doc? or do you know where those given equations go wrong. 

I know Hogenauer also included method for register pruning to reduce bit growth by distributing quantisation noise across stages. Naturally too involved and too specialised corner and may be unwarranted with FPGAs applications. 

--- Quote End ---  

 

 

I have got the Hogenauer's doc.i am attaching that document .In that observe cic interpolation filter design.In that observe register growth equation and design example.with the matlab code as below  

 

Bin = 8;  

%input width 

 

N = 4;  

%stages of comb or integrator 

 

M = 2;  

%differential delay 

 

R = 512;  

%interpolation rate 

 

 

 

%cic decimator at any stage 

 

Bout = N * log2(R*M) + Bin; 

 

 

 

%cic interpolator per ith stage  

 

%stages 1~N 

 

 

for i = 1:N 

 

G = 2^i; 

 

Bout =( Bin + log2(G)); 

 

d(i) = Bout; 

 

 

end 

 

 

 

 

 

%N+1 ~ 2N stages 

 

 

for i = N+1:N*2 

 

G = (2^(2*N-1)*(R*M)^(i-N))/R; 

 

Bout =( Bin + log2(G)); 

 

d(i) = Bout; 

 

 

end 

 

 

 

for 

i = 1:N*2 

 

fprintf( 

'%i %i\r',i,d(i)); 

 

 

end  

 

I got the bout values 

 

1 9 

2 10 

3 11 

4 12 

5 16 

6 26 

7 36 

8 46 

 

which is not matching the values  

9,10, 11,12, 12,21,30, and 39, respectively,which is not equal to the got values.is there any mistake in the matlab code?
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Altera_Forum
Honored Contributor II
1,074 Views

and where did you attach the doc to? 

 

I tried my luck numbers and here I managed to get expected values: 

 

Bin = 8; %input width 

N = 4; %stages of comb or integrator 

M = 2; %differential delay 

R = 512; %interpolation rate 

 

%cic decimator at any stage 

Bout = N * log2(R*M) + Bin; 

 

%cic interpolator per ith stage 

%stages 1~N 

for i = 1:N 

G = 2^i; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

%N+1 ~ 2N stages 

for i = N+1:N*2 

G = 2^(2*N-1)*(R*M)^(i-N)/R; 

Bout = Bin + log2(G) - i + 1; 

d(i) = Bout; 

end 

 

for i = 1:N*2 

fprintf('%i %i\r',i,d(i)); 

end
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Altera_Forum
Honored Contributor II
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G = (2^(2*N-1)*(R*M)^(i-N))/R; 

should be according to Hogenauer 

G = (2^(2*N-i)*(R*M)^(i-N))/R;
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

G = (2^(2*N-1)*(R*M)^(i-N))/R; 

should be according to Hogenauer 

G = (2^(2*N-i)*(R*M)^(i-N))/R; 

--- Quote End ---  

 

 

Thanks FvM. 

That makes sense now, just a typing error from doc to doc. 

 

new code(final??): 

Bin = 8; %input width 

N = 4; %stages of comb or integrator 

M = 2; %differential delay 

R = 512; %interpolation rate 

 

%cic decimator at any stage 

Bout = N * log2(R*M) + Bin; 

 

%cic interpolator per ith stage 

%stages 1~N 

for i = 1:N 

G = 2^i; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

%N+1 ~ 2N stages 

for i = N+1:N*2 

G = 2^(2*N-i)*(R*M)^(i-N)/R; 

Bout = Bin + log2(G); 

d(i) = Bout; 

end 

 

for i = 1:N*2 

fprintf('%i %i\r',i,d(i)); 

end
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

Thanks FvM.  

I assume the equations for bit growth given in attached doc look too involved to be wrongly typed from original source(Hogenauer's). 

But I did notice discrepancy of last equation when applied to i = N as Bout = Bin + N -1 

 

Anyway do you have access to Hogenauer's doc? or do you know where those given equations go wrong. 

I know Hogenauer also included method for register pruning to reduce bit growth by distributing quantisation noise across stages. Naturally too involved and too specialised corner and may be unwarranted with FPGAs applications. 

--- Quote End ---  

 

 

i am attaching that Hogenauer's doc.but still i am not able to solve the overflow problem in the integrator with the output width as obtained 

 

Bin = 24;  

%input width 

 

N = 9;  

%stages of comb or integrator 

 

M = 1;  

%differential delay 

 

R = 8;  

%interpolation rate 

 

 

 

%cic decimator at any stage 

 

Bout = N * log2(R*M) + Bin; 

 

 

 

%cic interpolator per ith stage 

 

 

%stages 1~N 

 

 

for i = 1:N 

 

G = 2^i; 

 

Bout = Bin + log2(G); 

 

d(i) = Bout; 

 

 

end 

 

 

 

%N+1 ~ 2N stages 

 

 

for i = N+1:N*2 

 

G = 2^(2*N-1)*(R*M)^(i-N)/R; 

 

Bout = Bin + log2(G) - i + 1; 

 

d(i) = Bout; 

 

 

end 

 

 

 

for 

i = 1:N*2 

 

fprintf( 

'%i %i\r',i,d(i)); 

 

 

end 

 

the d output obtained is as follows 

 

1 25 

2 26 

3 27 

4 28 

5 29 

6 30 

7 31 

8 32 

9 33 

10 32 

11 34 

12 36 

13 38 

14 40 

15 42 

16 44 

17 46 

18 48 

 

especially at the 9th stage of the comb section the output width is 33 and the interpolating factor is 8 .The input to first stage of integrator is 33 bit width and the output of second stage of integrator is 34.But still there is qverflow problem in the second integrator stage.Why that problem is coming can you explain it the reason?
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Altera_Forum
Honored Contributor II
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My guess is that the first integrator will have benefit of interpolation by 8 i.e. you need to insert 7 zeros after every sample before you apply it to the first integrator and hence the gain is reduced.

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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

My guess is that the first integrator will have benefit of interpolation by 8 i.e. you need to insert 7 zeros after every sample before you apply it to the first integrator and hence the gain is reduced. 

--- Quote End ---  

 

 

So can you give the solution for the problem for the overflow in the second integrator stage?
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

So can you give the solution for the problem for the overflow in the second integrator stage? 

--- Quote End ---  

 

 

Either Hogenauer got it wrong or you are doing something wrong.  

Do you insert 7 zeros after every sample at the input to first Integrator?  

Are you working at RTL level or matlab?
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

Either Hogenauer got it wrong or you are doing something wrong.  

Do you insert 7 zeros after every sample at the input to first Integrator?  

Are you working at RTL level or matlab? 

--- Quote End ---  

 

 

Initially i am working at the matlab level .first i have inserted 9 stages of the comb filter and then upsampler of factor 8 i.e insering 7 zeros and then 9 stages of the integrator.The second integrator sum is showing the overflow problem.the input to the first integrator stage is 32 bit as obtained and the input to the second integrator is 34 bit.but the sum in the input to the input of the intgrator is overflowed.can you check the matlab code that i have sent to you and the Hogenauer's paper and compare where i am going wrong?
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

Initially i am working at the matlab level .first i have inserted 9 stages of the comb filter and then upsampler of factor 8 i.e insering 7 zeros and then 9 stages of the integrator.The second integrator sum is showing the overflow problem.the input to the first integrator stage is 32 bit as obtained and the input to the second integrator is 34 bit.but the sum in the input to the input of the intgrator is overflowed.can you check the matlab code that i have sent to you and the Hogenauer's paper and compare where i am going wrong? 

--- Quote End ---  

 

 

I & FvM checked that already. There was typing error in your first doc which I corrected as -i+1 addition then FvM told us that Hogenauer's equation was mistyped as 2N-1 instead of 2N - i which is equivalent to what I did. Anyway I corrected te matlab code - see my last version and it does agree with your figures. 

 

So I am more inclined to think you are doing something wrong rather than Hogenauer or Donadio or FvM are wrong. Can you post your matlab code so we get the culprit.
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Altera_Forum
Honored Contributor II
1,074 Views

 

--- Quote Start ---  

I & FvM checked that already. There was typing error in your first doc which I corrected as -i+1 addition then FvM told us that Hogenauer's equation was mistyped as 2N-1 instead of 2N - i which is equivalent to what I did. Anyway I corrected te matlab code - see my last version and it does agree with your figures. 

 

So I am more inclined to think you are doing something wrong rather than Hogenauer or Donadio or FvM are wrong. Can you post your matlab code so we get the culprit. 

--- Quote End ---  

 

 

here is the matlab code that you wanted to see 

Bin = 24;  

%input width 

 

N = 9;  

%stages of comb or integrator 

 

M = 1;  

%differential delay 

 

R = 8;  

%interpolation rate 

 

 

 

%cic decimator at any stage 

 

Bout = N * log2(R*M) + Bin; 

 

 

 

%cic interpolator per ith stage 

 

 

%stages 1~N 

 

 

for i = 1:N 

 

G = 2^i; 

 

Bout = Bin + log2(G); 

 

d(i) = Bout; 

 

 

end 

 

 

 

%N+1 ~ 2N stages 

 

 

for i = N+1:N*2 

 

G = 2^(2*N-1)*(R*M)^(i-N)/R; 

 

Bout = Bin + log2(G) - i + 1; 

 

d(i) = Bout; 

 

 

end 

 

 

 

for 

i = 1:N*2 

 

fprintf( 

'%i %i\r',i,d(i)); 

 

 

end 

 

and the output for bout is 

 

1 25 

2 26 

3 27 

4 28 

5 29 

6 30 

7 31 

8 32 

9 33 

10 32 

11 34 

12 36 

13 38 

14 40 

15 42 

16 44 

17 46 

18 48 

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Altera_Forum
Honored Contributor II
1,023 Views

No, that is my own code for bit growth reposted??? 

 

I wanted your code(matlab or rtl) that implements the CIC structure
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