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Gyud0
Beginner
144 Views

can't programming a Cyclone V E Development kit

Hey,

I unsuccessfully tried to program a Cyclone V E Development kit to the CFI flash 512Mb on the kit.

I converted the sof file (that I successfully download to the kit) to a pof file via the Convert Programming File in Quartus application. I converted it to 1-bit Passive serial, according the next figure that you can fined in page number 22 in the device's datasheet:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/rm_cve_fpga_dev_boar...

Gyud0_0-1611862734243.png

 

This is the JTAG chain that I constructed in Quartus programmer:

Gyud0_1-1611863123719.png

 

 

When I tried to burn the pod file into the flash, I got the message that I don't have the PFL file that required (in data sheet it mentioned that the Parallel Flash Loader is included).

Moreover, I tried the JTAG chain with the FPGA master over the Flash device. In this scheme I expected to get the PFL file automaticlly but it didn't upload and I got the same error when I tried to burn the pof file

Gyud0_2-1611863540585.png

Can you help me?

Thank you

 

 

0 Kudos
11 Replies
JohnT_Intel
Employee
137 Views

Hi,


In order to program the CFI flash, I would recommend you to use Nios II EDS or Board Update Portal. Please refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_cve_fpga_dev_kit.pdf Page 31.


Gyud0
Beginner
132 Views

hey John,

I can't program the FPGA kit via the Quartus programmer?

JohnT_Intel
Employee
129 Views

Hi,


Could you confirm if you have configure the Max or FPGA with PFL design? If yes, may I know what is the error message that you are observing?


Have you try the development kit user guide to see if you are able to update the flash?


Gyud0
Beginner
118 Views

I tried to configure it as I showed in the pictures above. I got the errors:

"Flash Loader IP not loaded on device 1"

 

JohnT_Intel
Employee
101 Views

Hi,


Have you program the CPLD/FPGA 1st with PFL before programming the flash? Have you tried the step provide in user guide?


Gyud0
Beginner
92 Views

Do I need to add the PFL IP to the design?

because page 21 mentioned that the development board implements the Altera PFL mega function.

JohnT_Intel
Employee
78 Views

Hi,


If you are using your own design then you will need to include PFL. If you are using factory design, then it should include the PFL into the bitsream


Gyud0
Beginner
70 Views

ok.

So I  did the folowwing steps:

1) I reviewed the MSEL pin settings for Cyclone V devices .

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v2.pdf

you can see that in page 244.  I'm interesting in Active Serial X4 configuration so I configured the SW1 on the Evaluation kit. I tried the both remarked option bits

Gyud0_0-1612523224280.png

 

2) In Quartus project, In configuration (belongs to device and pin options), I chose:

Configuration scheme:  Active serial X4

Configuration mode: Standard

Use configuration device:EPCQ256

Configuration device I/O voltage: Auto

Active serial clock source:100MHz internal oscillator

Gyud0_0-1612532702461.png

 

 

 

3) I used the Convert Programming file window via Quartus  and chose:

programming file type:  .jic

Configuration device: EPCQ256

Model: Active serial x4

 

Flash Loader-> 5CEFA7

SOF Data-> project_file.sof

 

 

Gyud0_1-1612532796249.png

 

 

4)Via the Programmer windows I constructed the following chain:

Gyud0_2-1612532894621.png

 

 

And I pressed the Start button

 

I got the messages:

 

"209060- Started programmer operation at <Local_Time>"

"209016 Configuring device index 1"

"209017- Device 1 contains JTAG ID code 0x02B130D0"

"209007 Configuration succeed --1 device(s) configured"

"209025 can't recognized silicon ID for device 1. A device's silicon ID is different from its JTAG IS. verify that all cables are securely connected, select a different device, or check the power on the target system. Make sure the device pins are connected and configured correctly"

"209012 Operation failed"

"209061 Ended programmer operation at <Local_Time> "

 

 

 

 

 

 

 

 

 

 

 

JohnT_Intel
Employee
61 Views

Hi,


Could you try to performed Auto-detect after the failure? The reason is that I suspect that the flash device is not EPCQ256.


When you are generating jic file, could you click in the "Advanced..." button to see if the "Disable EPCS/EPCQ ID check" is enabled?


Gyud0
Beginner
50 Views

1)When I'm generating the JIC file,  the "Disable EPCS/EPCQ ID check" is enabled.

2)I did an Auto-detect after the failure and I got the message "The auto-detected device chain doesn't match the programming device list....." . So do I need to try it on another EPCQ device? 

JohnT_Intel
Employee
41 Views

Hi,


Could you provide the screenshot of the new JTAG chain device list?