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fifo megafunction simulation problem

Altera_Forum
Honored Contributor II
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hi there, 

 

i'm new in fpga world and i just started playing with megafunctions, and already encountered problems. 

 

i'm trying to adapt a working structure on xilinx to altera(the project isn't mine, i just have to adapt it to altera, so i can learn more about this job).  

 

i'm using a module with different clocks for read and write, asynchronous reset, and only the rdempty signal. when i simulate the entire module, after inserting some data's, i try to read them, but the "q" signal is zzzzz :(  

i also noticed that the rdempty signal is in a hi-z state. 

 

i replaced the megafunction fifo with a manual made module, having the same properties(different clocks, rdempty signal) and it works properly. 

 

Any ideas? please
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Altera_Forum
Honored Contributor II
270 Views

 

--- Quote Start ---  

hi there, 

 

i'm new in fpga world and i just started playing with megafunctions, and already encountered problems. 

 

i'm trying to adapt a working structure on xilinx to altera(the project isn't mine, i just have to adapt it to altera, so i can learn more about this job).  

 

i'm using a module with different clocks for read and write, asynchronous reset, and only the rdempty signal. when i simulate the entire module, after inserting some data's, i try to read them, but the "q" signal is zzzzz :(  

i also noticed that the rdempty signal is in a hi-z state. 

 

i replaced the megafunction fifo with a manual made module, having the same properties(different clocks, rdempty signal) and it works properly. 

 

Any ideas? please 

--- Quote End ---  

 

Did you fix your problem? I have similar problems since my q is also Z. Just to note, Altera-ModelSim only supports Altera's Megafuctions, if you are using any Xilinx IP on it, it will fail.
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Altera_Forum
Honored Contributor II
270 Views

Hi, 

I'm using a .tcl file for simulating. To work, you'll have to add the altera_mf library to the simulation. I've used the following code line: 

vsim -L altera_mf -t ns work.test_fifo
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Altera_Forum
Honored Contributor II
270 Views

 

--- Quote Start ---  

Hi, 

I'm using a .tcl file for simulating. To work, you'll have to add the altera_mf library to the simulation. I've used the following code line: 

vsim -L altera_mf -t ns work.test_fifo  

--- Quote End ---  

 

I think I do add the altera_mf library.
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