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float data format are simulated in Modelsim

Altera_Forum
Honored Contributor II
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Hi, 

Now, I need to simulate output data of FPGA in Modelsim which data format is signal precision . the width of single precision is 32 ,and the modelsim view those 32 bits to integer. 

and now I want to watch the wave of the data ,but I don't know how to convert data format to float in modelsim. please help me.
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Altera_Forum
Honored Contributor II
1,153 Views

Create a signal of type "real" in your testbench, then convert the 32 bit output to real. Then modelsim will display as floating point.

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Altera_Forum
Honored Contributor II
1,153 Views

Hi, 

Thank you for your reply, but I still do not know that real is double precision and the data width of real type is 64bit .But the output data from FPGA is single precision format,and its data width is still 32 bit .So 

please give me the details of the data convert in test bench.  

Best wishes,
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Altera_Forum
Honored Contributor II
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if you use the floating point library in the IEEE library (which is part of the VHDL 2008 spec) then coverting to real is as simple as: 

 

library ieee; use ieee.std_logic_1164.all; use ieee.float_lib.all; .... signal a : std_logic_vector(31 downto 0); signal r : real; .... r <= bitstoreal(a);
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Altera_Forum
Honored Contributor II
1,153 Views

Hi 

'a' is binary format in your code ,so you can invoke system function to convert 'a' to be a float data format. But the format of input data is single precision format in my code, so its different to the example you posted. In other words, the output data form FPGA module is single precision(its generated by a float sqrt IP CORE ALTFP_SQRT) in my code, and those data would be viewed as a 32 bit width binary data if we use '$bitstoreal' in test bench ,in fact, but those data is single precision.
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