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generated clocks or derived clocks "... without an associated clock assignment"

JanSch
Novice
276 Views

During my first steps with simple example designs on an experiment board I often use a clock derived from a hardware clock (input pin) by simple division.
Quartus then always recognizes the slower signal as clock without "an associated clock assignment". The circuit works though, but the warnings certainly have their purpose. Unfortunately, even after hours of reading endless "SDC" file manuals and dozens of examples, I have not found a solution to this, surely trivial, problem.

A simple, one module project, for instance:

module myI2C(

            input               CLOCK_50,
            input               [1:0]    KEY,
);

            wire     reset_n;
            wire     I2C_CLK;                  //my clock

            //counter
            reg       [6:0] I2CCLK;
            always@(posedge CLOCK_50)       I2CCLK <= I2CCLK + 1'b1;

            assign reset_n = KEY[0];
            assign I2C_CLK = I2CCLK[6];       //MSB of the counter

            always @ (posedge I2C_CLK or negedge reset_n)
            begin
                        // …
            End

            …

endmodule

... results when compiling completely with the warning:
„Warning (332060): Node: I2CCLK[6] was determined to be a clock but was found without an associated clock assignment.”

 

The SDC file of the project always contains:
create_clock -name CLOCK50 -period 20.000ns [get_ports CLOCK_50]
derive_pll_clocks
derive_clock_uncertainty

I have tried it with various additions. But they always make things worse! For example:
create_generated_clock -name I2CnCLK -source CLOCK50 -divide_by 128 [get_nets I2C_CLK]

results in:
Critical Warning (332049): Ignored create_generated_clock at myI2C.sdc … Argument <targets> is an empty collection

Can anyone here maybe help me?

Jan

0 Kudos
1 Solution
JanSch
Novice
253 Views

Thanks for the quick reply!

The .sdc file was of course already in the Project. Otherwise, I would not have seen the critical warning(332049) for my malformed “create_generated_clock“ command, right?

But I found the solution! Your mention of the "Timing Analyzer" made me re-read its manual, especially about the “create_generated_clock“ command! The command must be correctly stated for my example above:
create_generated_clock -name any_name -source [get_ports {CLOCK_50}] -divide_by 128 [get_pins {I2CCLK[6]|q}]

With this, the warning (332060) disappears and also the results of the "Timing Analyzer" become more plausible!

Best regards,
Jan

View solution in original post

5 Replies
sstrell
Honored Contributor III
267 Views

Check to make sure you've added your .sdc file to your project in the Timing Analyzer settings.  Very common mistake of people not adding the .sdc to their project.  If you have and you are still getting the warning, start the Timing Analyzer and generate the unconstrained paths report and the ignored constraints report.  Your create_clock constraint looks correct (don't do the generated clock constraint you mention), so these diagnostic reports might clue you in to what's wrong.

JanSch
Novice
254 Views

Thanks for the quick reply!

The .sdc file was of course already in the Project. Otherwise, I would not have seen the critical warning(332049) for my malformed “create_generated_clock“ command, right?

But I found the solution! Your mention of the "Timing Analyzer" made me re-read its manual, especially about the “create_generated_clock“ command! The command must be correctly stated for my example above:
create_generated_clock -name any_name -source [get_ports {CLOCK_50}] -divide_by 128 [get_pins {I2CCLK[6]|q}]

With this, the warning (332060) disappears and also the results of the "Timing Analyzer" become more plausible!

Best regards,
Jan

View solution in original post

Kenny_Tan
Moderator
246 Views

usually, what i will do is right click and insert constrain in the sdc files. Make sure the nodes can be find from there.


Kenny_Tan
Moderator
226 Views

We do not receive any response from you to the previous reply that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 


JanSch
Novice
215 Views
Hello Kenny, I had already marked my problem as solved (-> there was a button)? The solution for a warning (332060) is ( contrary to the recommendation of "sstrell") to insert a "create_generated_clock" command into the SDC file. The correct syntax can be generated with the "Timing Analyzer". I took your post of February 10 as an additional, final comment. Should I better have added a comment like: "Yes, I also copy-pasted the command from the command generator", in response to your comment? If I have unknowingly broken etiquette here, I apologize! I find a platform like this very useful and do not want to appear impolite at all. I think we can close this thread. Jan
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