Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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help for Error (170143): Final fitting attempt was unsuccessful

3f28dsboek
Novice
563 Views
The complier give the following error message
Anyone can tell me how to analyze the error? 
I can't figure out the reason of failure in routing from these message
 
Error (23035 Tcl error: ERROR: Error(s) found while running an executable. See report file(s) for error message(s). Message log indicates which executable was run last.
---- where is the location of the report file(s)
 
 
 
 
aoc device/matrix_mult.cl -o bin/matrix_mult.aocx -fp-relaxed -fpc -dont-error-if-large-area-est -no-interleaving=default --board pac_s10_dc
Warning: Command has been deprecated. Please use -board=<value> instead of --board <value>
aoc: Running OpenCL parser....
aoc: OpenCL parser completed successfully.
aoc: Linking Object files....
aoc: Optimizing and doing static analysis of code...
aoc: First stage compilation completed successfully.
Compiling for FPGA. This process may take a long time, please be patient.
Error (170143): Final fitting attempt was unsuccessful
Error: An error occurred during routing
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 452 warnings
Error (293001): Quartus Prime Full Compilation was unsuccessful. 3 errors, 2295 warnings
Error (23035): Tcl error: ERROR: Error(s) found while running an executable. See report file(s) for error message(s). Message log indicates which executable was run last.
Error (23031): Evaluation of Tcl script s10_partial_reconfig/flow.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 9 errors, 2295 warnings
Error (16546): Cannot load final database - ensure all earlier stages of the compiler have completed.
Error (17941): The design could not be loaded due to errors.
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script scripts/adjust_plls_mcp.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 4 errors, 0 warnings
Error: Compiler Error, not able to generate hardware
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ShengN_Intel
Employee
536 Views

Hi,

 

Below is a similar previous case about Error (170143) for your reference.

https://community.intel.com/t5/Intel-High-Level-Design/Compiler-error-during-routing-on-Intel-DevCloud/m-p/640430 

 

May be you have to reduce some code in your kernel in order to solve the congestion issue.

 

Best regards,
Sheng


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3f28dsboek
Novice
531 Views

Hi Sheng, 

In the report only DSP usage is above 25%, so the routing problem should due to DSP. 

Does that mean we can never make full use of DSP?

 

What percentage of DSP is a reasonable design that can be routed?

 

Thank you very much

 

3f28dsboek_0-1643259764773.png

 

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ShengN_Intel
Employee
518 Views

Hi,

 

Regarding that particular DSP usage question you mentioned above, perhaps you can open a new thread in Intel® High Level Design forum for better confirmation. The link of the forum is provided below.

https://community.intel.com/t5/Intel-High-Level-Design/bd-p/high-level-design 

 

Best regards,

Sheng

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