Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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how to set the fast output register?

Altera_Forum
Honored Contributor II
‎06-27-2011 11:56 AM
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Hi,

 I am using DE1 board for my assignment and now trying to test the FLASH on the board.  The IP in the SOPC_builder is Altera University Program Flash Memory IP Core, and in its documentation it mentions:  1. Fast Output Register flag should be turned ON 2. Tco requirement should be set to no more than 10ns, and 3. Tsu requirement should be set to no more than 10ns.  How to do this? I am not familiar with QuartusII. In Assignment Editor I didn't find setting as other posts said.   Best, Dong

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Altera_Forum
Honored Contributor II
‎06-27-2011 08:31 PM
523 Views

Fast Input Register and Fast Output Register show up in 11.0 Assignment Editor in the Assignment Name column

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Altera_Forum
Honored Contributor II
‎06-27-2011 09:07 PM
523 Views

Thank you pancake I just found it! 

I am really new to these tools... 

 

Best, 

Dong
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