Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16595 Discussions

how to set the fast output register?

Altera_Forum
Honored Contributor II
‎06-27-2011 11:56 AM
2,204 Views

Hi,

 I am using DE1 board for my assignment and now trying to test the FLASH on the board.  The IP in the SOPC_builder is Altera University Program Flash Memory IP Core, and in its documentation it mentions:  1. Fast Output Register flag should be turned ON 2. Tco requirement should be set to no more than 10ns, and 3. Tsu requirement should be set to no more than 10ns.  How to do this? I am not familiar with QuartusII. In Assignment Editor I didn't find setting as other posts said.   Best, Dong

0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎06-27-2011 08:31 PM
522 Views

Fast Input Register and Fast Output Register show up in 11.0 Assignment Editor in the Assignment Name column

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎06-27-2011 09:07 PM
522 Views

Thank you pancake I just found it! 

I am really new to these tools... 

 

Best, 

Dong
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.