Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
15543 Discussions

how to simulate Memory IP module with ModelSim?

RCast36
Beginner
312 Views

In the project I have added the *.sip and the *.qip in the files setting, but only appear the *.qip, seems the simulation *.sip is not correctly define in my project. During the simulation I get errors like Memory is not bounded.

0 Kudos
1 Reply
AnandRaj_S_Intel
Employee
135 Views

Hi Ruben,

 

Do you have a test-bench or are you using the msim.tcl for simulation?

If you have test-bench instantiate your design and map the ports to your test bench and make it top level?

 

If possible share your project.

 

Regards

Anand

Reply